公开(公告)号：US09098391B2

公开(公告)日：2015-08-04

申请号：US14052834

申请日：2013-10-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyun-Seuk Yoo ,  Jun-Jin Kong ,  Chang-Kyu Seol ,  Hong-Rak Son ,  Young-Geon Yoo

IPC: G06F12/00 ,  G06F11/10 ,  G11C16/34 ,  G11C11/56 ,  G11C16/16 ,  G11C29/00 ,  G11C16/12 ,  G11C16/10

CPC classification number: G06F12/00 ,  G06F11/10 ,  G06F11/1048 ,  G11C11/5628 ,  G11C16/10 ,  G11C16/12 ,  G11C16/16 ,  G11C16/3427 ,  G11C16/3454 ,  G11C29/00 ,  G11C2211/5648

Abstract: Provided is a method of operating a memory system. The method includes programming first bit data into multiple memory cells; identifying target memory cells that are in a first state and have threshold voltages equal to or greater than a first voltage from the memory cells programmed with the first bit data; receiving second bit data which is to be programmed into the memory cells; calculating multiple third bit data by performing a first process on the second bit data; and selecting third bit data of the calculated multiple third bit data that changes a largest number of target memory cells from the first state to a second state when the memory cells are programmed with each of the multiple third bit data, respectively. The selected third bit data is programmed into the memory cells.

Abstract translation: 提供了一种操作存储器系统的方法。 该方法包括将第一位数据编程到多个存储器单元中; 识别处于第一状态并且具有等于或大于来自由第一位数据编程的存储器单元的第一电压的阈值电压的目标存储器单元; 接收要编程到存储器单元中的第二位数据; 通过对所述第二位数据执行第一处理来计算多个第三位数据; 以及当所述存储器单元分别被所述多个第三位数据中的每一个编程时，选择将所述最大数目的目标存储单元从所述第一状态改变到第二状态的所计算的多个第三位数据的第三位数据。 所选择的第三位数据被编程到存储器单元中。

公开(公告)号：US09570174B2

公开(公告)日：2017-02-14

申请号：US14446350

申请日：2014-07-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Avner Dor ,  Moshe Twitto ,  Jun-Jin Kong ,  Hong-Rak Son ,  Young-Geon Yoo

IPC: G06F11/10 ,  G11C16/10 ,  G11C16/08 ,  G11C11/56 ,  G11C16/04

CPC classification number: G11C16/10 ,  G06F11/1048 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/08

Abstract: Provided are a coding/decoding method for use in a multi-level memory system. The coding method includes searching for a set of symbols that may generate a forbidden pattern that is set initially from an input data stream, and sticking at least one bit included in the searched set of the symbols that may generate the forbidden pattern so as not to generate the forbidden pattern.

Abstract translation: 提供了一种用于多级存储器系统中的编码/解码方法。 编码方法包括搜索可以生成最初从输入数据流设置的禁止模式的一组符号，并且将包含在搜索到的可能生成禁止模式的符号组中的至少一个比特，以便不 生成禁止的模式。

公开(公告)号：US09881671B2

公开(公告)日：2018-01-30

申请号：US15044301

申请日：2016-02-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun Chu Oh ,  Young-Geon Yoo ,  Jun Jin Kong ,  Hong-Rak Son ,  Han-Shin Shin

IPC: G11C13/00 ,  G11C11/16 ,  G11C11/56 ,  G06F11/10

CPC classification number: G11C13/004 ,  G06F11/1048 ,  G11C11/1655 ,  G11C11/1673 ,  G11C11/5607 ,  G11C11/5657 ,  G11C11/5664 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0026 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2213/72

Abstract: A method is for operating a resistive memory system including a resistive memory device implemented as multi-level memory cells. The method includes setting levels of reference voltages used to determine resistance states of the multi-level memory cells, and reading data of the multi-level memory cells based on the reference voltages. A difference between the reference voltages used to determine a relatively high resistance state is greater than a difference between the reference voltages used to determine a relatively low resistance state.