公开(公告)号：US20180287634A1

公开(公告)日：2018-10-04

申请号：US15475602

申请日：2017-03-31

Applicant: SanDisk Technologies LLC

Inventor： Rami Rom ,  Idan Goldenberg ,  Alexander Bazarsky ,  Eran Sharon ,  Ran Zamir ,  Idan Alrod ,  Stella Achtenberg

IPC: H03M13/11 ,  H03M13/00

CPC classification number: H03M13/118 ,  G06F3/0619 ,  G06F3/0655 ,  G06F3/0688 ,  G06F11/10 ,  G06F11/1048 ,  H03M13/1102 ,  H03M13/1125 ,  H03M13/116 ,  H03M13/3715 ,  H03M13/616 ,  H03M13/6516 ,  H03M13/6566

Abstract: A storage device may program data differently for different memory areas of a memory. In some embodiments, the storage device may use different codebooks for different memory areas. In other embodiments, the storage device may modify bit orders differently for different memory areas. What codebook the storage device uses or what bit order modification the storage device performs for a particular memory area may depend on the bad storage locations specific to that memory area. Where different codebooks are used, optimal codebooks may be selected from a library, or codebooks may be modified based on the bad storage locations of the memory areas.

公开(公告)号：US10089177B2

公开(公告)日：2018-10-02

申请号：US15061246

申请日：2016-03-04

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Alexander Bazarsky ,  Ran Zamir ,  Eran Sharon ,  Idan Alrod

IPC: H03M13/00 ,  G06F11/10 ,  G06F3/06 ,  H03M13/11 ,  H03M13/37 ,  G11C29/00 ,  H03M13/15 ,  H03M13/29 ,  G11C16/34 ,  G11C29/52 ,  G11C29/04

Abstract: An apparatus includes a memory die including a group of storage elements and one or more unallocated redundant columns. A number of the unallocated redundant columns is based on a number of one or more bad columns of the memory die. The apparatus further includes a controller coupled to the memory. The controller is configured to receive data and redundancy information associated with the data from the memory. The data includes a first bit, and the redundancy information includes a second bit. The redundancy information is sensed from the one or more unallocated redundant columns and has a size that is based on the number of one or more bad columns. The controller is further configured to determine a value of the first bit based on one or more parity check conditions associated with the second bit.

公开(公告)号：US10002086B1

公开(公告)日：2018-06-19

申请号：US15385324

申请日：2016-12-20

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Stella Achtenberg ,  Eran Sharon ,  Ran Zamir ,  Amir Shaharabany

IPC: H03M13/00 ,  G06F13/16 ,  G06F13/40 ,  G06F11/10 ,  G11C29/52 ,  H03M13/11 ,  G06F3/06

Abstract: In an illustrative example, a device includes a memory and a controller that is coupled to the memory and that is configured to communicate with the memory using at least a first channel and a second channel. The controller includes a bit error rate (BER) estimator configured to estimate a first BER corresponding to the first channel and a second BER corresponding to the second channel. The controller also includes a throughput balancer configured to determine whether to adjust at least one of a first clock rate of the first channel or a second clock rate of the second channel based on the first BER and the second BER.

公开(公告)号：US20170255512A1

公开(公告)日：2017-09-07

申请号：US15252753

申请日：2016-08-31

Applicant: SanDisk Technologies LLC

Inventor： Ran Zamir ,  Alexander Bazarsky ,  Eran Sharon ,  Idan Alrod

IPC: G06F11/10 ,  H03M13/35 ,  G06F3/06 ,  G11C29/52

CPC classification number: H03M13/353 ,  G06F11/1012 ,  G06F11/108 ,  G11C29/52 ,  H03M13/1102 ,  H03M13/1108 ,  H03M13/1111 ,  H03M13/27 ,  H03M13/2909 ,  H03M13/618

Abstract: A non-volatile memory system may be configured to generate a codeword with first-type parity bits and one or more second-type parity bits. If a storage location in which the codeword is to be stored includes one or more bad memory cells, the bit sequence of the codeword may be arranged so that at least some of the second-type parity bits are stored in the bad memory cells. During decoding, a first set of syndrome values may be determined for a first set of check nodes and a second set of syndrome values may be determined for a second set of check nodes. In some examples, a syndrome weight used for determining if convergence is achieved may be calculated using check nodes that are unassociated with the second-type parity bits.

公开(公告)号：US10432232B2

公开(公告)日：2019-10-01

申请号：US15252753

申请日：2016-08-31

Applicant: SanDisk Technologies LLC

Inventor： Ran Zamir ,  Alexander Bazarsky ,  Eran Sharon ,  Idan Alrod

IPC: G06F11/10 ,  H03M13/35 ,  G06F3/06 ,  G11C29/52 ,  H03M13/11 ,  H03M13/27 ,  H03M13/29 ,  H03M13/00

Abstract: A non-volatile memory system may be configured to generate a codeword with first-type parity bits and one or more second-type parity bits. If a storage location in which the codeword is to be stored includes one or more bad memory cells, the bit sequence of the codeword may be arranged so that at least some of the second-type parity bits are stored in the bad memory cells. During decoding, a first set of syndrome values may be determined for a first set of check nodes and a second set of syndrome values may be determined for a second set of check nodes. In some examples, a syndrome weight used for determining if convergence is achieved may be calculated using check nodes that are unassociated with the second-type parity bits.

公开(公告)号：US10230395B2

公开(公告)日：2019-03-12

申请号：US15475638

申请日：2017-03-31

Applicant: SanDisk Technologies LLC

Inventor： Rami Rom ,  Idan Goldenberg ,  Alexander Bazarsky ,  Eran Sharon ,  Ran Zamir ,  Idan Alrod ,  Stella Achtenberg

IPC: H03M13/11 ,  H03M13/00 ,  G06F3/06

Abstract: A storage device may program data differently for different memory areas of a memory. In some embodiments, the storage device may use different codebooks for different memory areas. In other embodiments, the storage device may modify bit orders differently for different memory areas. What codebook the storage device uses or what bit order modification the storage device performs for a particular memory area may depend on the bad storage locations specific to that memory area. Where different codebooks are used, optimal codebooks may be selected from a library, or codebooks may be modified based on the bad storage locations of the memory areas.

公开(公告)号：US20180287636A1

公开(公告)日：2018-10-04

申请号：US15475638

申请日：2017-03-31

Applicant: SanDisk Technologies LLC

Inventor： Rami Rom ,  ldan Goldenberg ,  Alexander Bazarsky ,  Eran Sharon ,  Ran Zamir ,  ldan Alrod ,  Stella Achtenberg

IPC: H03M13/11 ,  H03M13/00 ,  G06F3/06

CPC classification number: H03M13/1125 ,  G06F3/0619 ,  G06F3/0655 ,  G06F3/0688 ,  H03M13/6566

Abstract: A storage device may program data differently for different memory areas of a memory. In some embodiments, the storage device may use different codebooks for different memory areas. In other embodiments, the storage device may modify bit orders differently for different memory areas. What codebook the storage device uses or what bit order modification the storage device performs for a particular memory area may depend on the bad storage locations specific to that memory area. Where different codebooks are used, optimal codebooks may be selected from a library, or codebooks may be modified based on the bad storage locations of the memory areas.