公开(公告)号：US10216965B2

公开(公告)日：2019-02-26

申请号：US15109747

申请日：2014-12-23

Applicant: STC.UNM ,  Case Western Reserve University

Inventor： James Plusquellic ,  Swarup Bhunia

IPC: G06F21/75 ,  G11C23/00 ,  G06F7/58 ,  H04L9/08 ,  G09C1/00 ,  G06F21/60 ,  G11C13/00 ,  G11C16/10 ,  G11C16/26

Abstract: This disclosure describes techniques for generating physically unclonable functions (PUF) from non-volatile memory cells. The PUFs leverage resistance variations in non-volatile memory cells. Resistance variations in array of non-volatile memory cells may be produce a bitstring during an enrollment process. The bitstring may be stored in the non-volatile memory array. Regeneration may include retrieving the bitstring from the non-volatile memory array.

公开(公告)号：US10671350B2

公开(公告)日：2020-06-02

申请号：US16051427

申请日：2018-07-31

Applicant: STC.UNM

Inventor： James Plusquellic

IPC: G06F7/58 ,  G09C1/00 ,  H04L9/00 ,  H04L9/08

Abstract: This disclosure describes techniques for analyzing statistical quality of bitstrings produced by a physical unclonable function (PUF). The PUF leverages resistance variations in the power grid wires of an integrated circuit. Temperature and voltage stability of the bitstrings are analyzed. The disclosure also describes converting a voltage drop into a digital code, wherein the conversion is resilient to simple and differential side-channel attacks.

公开(公告)号：US10666256B2

公开(公告)日：2020-05-26

申请号：US16185921

申请日：2018-11-09

Applicant: STC.UNM

Inventor： James Plusquellic ,  James Aarestad

IPC: H03K19/003 ,  H03K19/21 ,  H03K3/84 ,  H03K23/00 ,  H04L9/06 ,  H04L9/08

Abstract: A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.

公开(公告)号：US20160328578A1

公开(公告)日：2016-11-10

申请号：US15109747

申请日：2014-12-23

Applicant: STC.UNM ,  CASE WESTERN RESERVE UNIVERSITY

Inventor： James Plusquellic ,  Swarup Bhunia

IPC: G06F21/75 ,  G06F21/60 ,  G11C16/26 ,  G11C13/00 ,  G11C23/00 ,  G11C16/10

CPC classification number: G06F21/75 ,  G06F7/588 ,  G06F21/604 ,  G09C1/00 ,  G11C13/004 ,  G11C13/0069 ,  G11C16/10 ,  G11C16/26 ,  G11C23/00 ,  H04L9/0866 ,  H04L2209/12

Abstract: This disclosure describes techniques for generating physically unclonable functions (PUF) from non-volatile memory cells. The PUFs leverage resistance variations in non-volatile memory cells. Resistance variations in array of non-volatile memory cells may be produce a bitstring during an enrollment process. The bitstring may be stored in the non-volatile memory array. Regeneration may include retrieving the bitstring from the non-volatile memory array.

Abstract translation: 本公开描述了用于从非易失性存储器单元生成物理不可克隆功能（PUF）的技术。 PUF利用非易失性存储单元中的电阻变化。 非易失性存储器单元阵列中的电阻变化可能在注册过程中产生位串。 位串可以存储在非易失性存储器阵列中。 再生可以包括从非易失性存储器阵列检索位串。

公开(公告)号：US10230369B2

公开(公告)日：2019-03-12

申请号：US14913454

申请日：2014-08-28

Applicant: STC.UNM

Inventor： James Plusquellic ,  James Aarestad

IPC: H05B33/08 ,  H03K19/003 ,  H03K19/21 ,  H03K3/84 ,  H03K23/00

Abstract: A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.

公开(公告)号：US20160204781A1

公开(公告)日：2016-07-14

申请号：US14913454

申请日：2014-08-28

Applicant: STC.UNM

Inventor： James Plusquellic ,  James Aarestad

IPC: H03K19/003 ,  H03K19/21

CPC classification number: H03K19/00323 ,  H03K3/84 ,  H03K19/00315 ,  H03K19/215 ,  H03K23/004 ,  H04L9/0662 ,  H04L9/0866

Abstract: A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.

Abstract translation: 硬件嵌入延迟PUF（HELP）通过监视路径稳定性和测量核心逻辑宏的路径延迟来利用熵。 帮助包含处理偏见的技术。 HELP的一个独特之处在于可以比较不同测试结构测量的数据。 HELP可以在现有的FPGA平台上实现。 帮助可以利用路径稳定性和模内变化作为熵的来源。