公开(公告)号：US11828875B2

公开(公告)日：2023-11-28

申请号：US17551001

申请日：2021-12-14

Applicant: STMICROELECTRONICS PTE LTD

Inventor： David Gani

IPC: G01S7/18 ,  G01J1/42 ,  G01S7/481 ,  G01S17/08 ,  G01S7/493 ,  G01S7/497 ,  G01S7/487 ,  G01S17/04 ,  G01S7/48

CPC classification number: G01S7/4808 ,  G01J1/4204 ,  G01S7/4813 ,  G01S7/4814 ,  G01S7/4816 ,  G01S7/4876 ,  G01S7/493 ,  G01S7/497 ,  G01S17/04 ,  G01S17/08

Abstract: A semiconductor package that is a proximity sensor includes a light transmitting die, a light receiving die, an ambient light sensor, a cap, and a substrate. The light receiving die and the light transmitting die are coupled to the substrate. The cap is coupled to the substrate forming a first chamber around the light transmitting die and a second chamber around the light receiving die. The cap further includes a recess with contact pads. The ambient light sensor is mounted within the recess of the cap and coupled to the contact pads. The cap includes electrical traces that are coupled to the contact pads within the recess coupling the ambient light sensor to the substrate. By utilizing a cap with a recess containing contact pads, a proximity sensor can be formed in a single semiconductor package all while maintaining a compact size and reducing the manufacturing costs of proximity sensors.

公开(公告)号：US11193821B2

公开(公告)日：2021-12-07

申请号：US16213197

申请日：2018-12-07

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Laurent Herard ,  David Gani

IPC: H01J40/14 ,  G01J1/02 ,  G01J1/42

Abstract: One or more embodiments are directed to ambient light sensor packages, and methods of making ambient light sensor packages. One embodiment is directed to an ambient light sensor package that includes an ambient light sensor die having opposing first and second surfaces, a light sensor on the first surface of the ambient light sensor die, one or more conductive bumps on the second surface of the ambient light sensor die, and a light shielding layer on at least the first surface and the second surface of the ambient light sensor die. The light shielding layer defines an opening over the light sensor. The ambient light sensor package may further include a transparent cover between the first surface of the ambient light sensor die and the light shielding layer, and an adhesive that secures the transparent cover to the ambient light sensor die.

公开(公告)号：US09768216B2

公开(公告)日：2017-09-19

申请号：US14535423

申请日：2014-11-07

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Dave Alexis Delacruz ,  David Gani

IPC: H01L27/146 ,  G03B17/02 ,  G03B29/00 ,  G03B3/10

CPC classification number: H01L27/14625 ,  G03B3/10 ,  G03B17/02 ,  G03B29/00 ,  H01L27/14618 ,  H01L27/14685

Abstract: An image sensor device may include an interconnect layer, an image sensor IC on the interconnect layer, and a barrel adjacent the interconnect layer and having first electrically conductive traces. The image sensor device may include a liquid crystal focus cell carried by the barrel and having cell layers, and second electrically conductive contacts. A pair of adjacent cell layers may have different widths. The image sensor device may include an electrically conductive adhesive body coupling at least one of the second electrically conductive contacts to a corresponding one of the first electrically conductive traces.

公开(公告)号：US20140293120A1

公开(公告)日：2014-10-02

申请号：US13853598

申请日：2013-03-29

Applicant: STMICROELECTRONICS PTE LTD.

Inventor： Hk Looi ,  Wee Chin Judy Lim ,  Cheng-Hai Cheh ,  Bs Aw ,  David Gani ,  Tin-Tun Maung ,  Choon Lee Lai

IPC: H04N5/225 ,  G03B3/10 ,  G02B7/09

CPC classification number: G03B3/10 ,  G02B7/08 ,  G02B7/09 ,  H02K41/031 ,  Y10T29/4913

Abstract: Described herein are various embodiments of contacts that include different portions angled with respect to one another and methods of manufacturing devices that include such contacts. In some embodiments, a module may include a first portion of a contact that is disposed within a housing and a second portion that is disposed outside of the housing, with the second portion angled with respect to the first portion. Manufacturing such devices may include depositing a conductive material to electrically connect the contact to a contact pad of a substrate. In some embodiments, a deposition process for depositing the conductive material may have a minimum dimension, which defines a minimum dimension of a conductive material once deposited. In some such embodiments, a distance between a terminal end of the contact pin and the contact pad may be greater than the minimum dimension of the deposition process.

Abstract translation: 这里描述的触点的各种实施例包括相对于彼此成角度的不同部分和制造包括这种触点的装置的方法。 在一些实施例中，模块可以包括设置在壳体内的接触件的第一部分和设置在壳体外部的第二部分，其中第二部分相对于第一部分成角度。 制造这样的器件可以包括沉积导电材料以将触点电连接到衬底的接触焊盘。 在一些实施例中，用于沉积导电材料的沉积工艺可以具有最小尺寸，其限定一旦沉积的导电材料的最小尺寸。 在一些这样的实施例中，接触针的末端与接触垫之间的距离可以大于沉积过程的最小尺寸。

公开(公告)号：US12136608B2

公开(公告)日：2024-11-05

申请号：US18166931

申请日：2023-02-09

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Yong Chen ,  David Gani

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/13 ,  H01L23/498 ,  H01L25/16

Abstract: A multi-chip package including a first integrated circuit and a second integrated circuit. The first integrated circuit includes a first side having a first conductive layer, a second side having a second conductive layer, and an edge, the first conductive layer coupled to the second conductive layer at a location adjacent to the edge. The second integrated circuit is coupled to the second conductive layer of the first integrated circuit.

公开(公告)号：US11502029B2

公开(公告)日：2022-11-15

申请号：US16927776

申请日：2020-07-13

Applicant: STMICROELECTRONICS PTE LTD ,  STMICROELECTRONICS (ROUSSET) SAS

Inventor： Laurent Herard ,  David Parker ,  David Gani

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/3065

Abstract: The present disclosure provides devices and methods in which a semiconductor chip has a reduced size and thickness. The device is manufactured by utilizing a sacrificial or dummy silicon wafer. A recess is formed in the dummy silicon wafer where the semiconductor chip is mounted in the recess. The space between the dummy silicon wafer and the chip is filled with underfill material. The dummy silicon wafer and the backside of the chip are etched using any suitable etching process until the dummy silicon wafer is removed, and the thickness of the chip is reduced. With this process, the overall thickness of the semiconductor chip can be thinned down to less than 50 μm in some embodiments. The ultra-thin semiconductor chip can be incorporated in manufacturing flexible/rollable display panels, foldable mobile devices, wearable displays, or any other electrical or electronic devices.

公开(公告)号：US11366156B2

公开(公告)日：2022-06-21

申请号：US16746201

申请日：2020-01-17

Applicant: STMicroelectronics Pte Ltd

Inventor： Pedro Jr Santos Peralta ,  David Gani

IPC: G01R31/28 ,  H01L21/66 ,  G01R31/3185 ,  G01R31/26

Abstract: A method of testing integrated circuit die for presence of a crack includes performing back end integrated circuit fabrication processes on a wafer having a plurality of integrated circuit die, the back end fabrication including an assembly process. The assembly process includes a) lowering a tip of a first manipulator arm to contact a given die such that pogo pins extending from the tip make electrical contact with conductive areas on the given die so that the pogo pins are electrically connected to a crack detector on the given die, b) picking up the given die using the first manipulator arm, and c) performing a conductivity test on the crack detector using the pogo pins to determine presence of a crack in the given die that extends from a periphery of the die, through a die seal ring of the die, and into an integrated circuit region of the die.

公开(公告)号：US11069667B2

公开(公告)日：2021-07-20

申请号：US15087959

申请日：2016-03-31

Applicant: STMicroelectronics Pte Ltd

Inventor： David Gani

IPC: H01L25/16 ,  H01L21/768 ,  H01L23/48 ,  H01L31/02 ,  H01L31/167 ,  H01L31/18 ,  H01S5/022 ,  H04M1/02 ,  G06F3/041 ,  G01S17/04 ,  H01S5/02325

Abstract: Wafer level proximity sensors are formed by processing a silicon substrate wafer and a silicon cap wafer separately, bonding the cap wafer to the substrate wafer, forming an interconnect structure of through-silicon vias within the substrate, and singulating the bonded wafers to yield individually packaged sensors. The wafer level proximity sensor is smaller than a conventional proximity sensor and can be manufactured using a shorter fabrication process at a lower cost. The proximity sensors are coupled to external components by a signal path that includes the through-silicon vias and a ball grid array formed on a lower surface of the silicon substrate. The design of the wafer level proximity sensor passes more light from the light emitter and more light to the light sensor.

公开(公告)号：US10910287B2

公开(公告)日：2021-02-02

申请号：US16270927

申请日：2019-02-08

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Yun Liu ,  David Gani

IPC: H01L23/31 ,  H01L21/78 ,  H01L21/56 ,  H01L21/304 ,  H01L23/00 ,  H01L23/28

Abstract: A semiconductor package having a die with a sidewall protected by molding compound, and methods of forming the same are disclosed. The package includes a die with a first surface opposite a second surface and sidewalls extending between the first and second surfaces. A redistribution layer is formed on the first surface of each die. An area of the first surface of the die is greater than an area of the redistribution layer, such that a portion of the first surface of the die is exposed. When molding compound is formed over the die and the redistribution layer to form a semiconductor package, the molding compound is on the first surface of the die between an outer edge of the redistribution layer and an outer edge of the first surface. The molding compound is also on the sidewalls of the die, which provides protection against chipping or cracking during transport.

公开(公告)号：US10763194B2

公开(公告)日：2020-09-01

申请号：US15713389

申请日：2017-09-22

Applicant: STMicroelectronics, Inc. ,  STMicroelectronics Pte Ltd

Inventor： Rennier Rodriguez ,  Bryan Christian Bacquian ,  Maiden Grace Maming ,  David Gani

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L21/683

Abstract: A semiconductor package includes a lead frame, a die, a discrete electrical component, and electrical connections. The lead frame includes leads and a die pad. Some of the leads include engraved regions that have recesses therein and the die pad may include an engraved region or multiple engraved regions. Each engraved region is formed to contain and confine a conductive adhesive from flowing over the edges of the engraved leads or the die pad. The boundary confines the conductive adhesive to the appropriate location on the engraved lead or the engraved die pad when being placed on the engraved regions. By utilizing a lead frame with engraved regions, the flow of the conductive adhesive or the wettability of the conductive adhesive can be contained and confined to the appropriate areas of the engraved lead or engraved die pad such that a conductive adhesive does not cause cross-talk between electrical components within a semiconductor package or short circuiting within a semiconductor package.