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公开(公告)号:US12119306B2
公开(公告)日:2024-10-15
申请号:US18307277
申请日:2023-04-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ju-Il Choi , Gyuho Kang , Un-Byoung Kang , Byeongchan Kim , Junyoung Park , Jongho Lee , Hyunsu Hwang
IPC: H01L23/538 , H01L23/00 , H01L23/31 , H01L23/498 , H01L25/10
CPC classification number: H01L23/5389 , H01L23/3128 , H01L23/49811 , H01L23/49822 , H01L23/49838 , H01L23/5383 , H01L24/16 , H01L25/105 , H01L2224/16225
Abstract: A semiconductor package including a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer may be provided. Each of the redistribution patterns may include a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion. The via portion, the pad portion, and the line portion may be connected to each other to form a single object. A level of a bottom surface of the pad portion may be lower than a level of a bottom surface of the line portion. A width of the line portion may have a largest value at a level between a top surface of the line portion and the bottom surface of the line portion.
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公开(公告)号:US20230275011A1
公开(公告)日:2023-08-31
申请号:US18311621
申请日:2023-05-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggi Jin , Gyuho Kang , Solji Song , Un-Byoung Kang , Ju-Il Choi
IPC: H01L23/498 , H01L23/00
CPC classification number: H01L23/49816 , H01L23/49822 , H01L24/16 , H01L23/49838 , H01L2224/16227
Abstract: A semiconductor package may include a redistribution substrate having a first surface and a second surface, opposite to each other, a semiconductor chip on the first surface of the redistribution substrate, and a solder pattern on the second surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern coupled to the solder pattern, a first redistribution pattern on the under-bump pattern, the first redistribution pattern including a first via portion and a first wire portion, and a first seed pattern between the under-bump pattern and the first redistribution pattern and on a side surface of the first via portion and a bottom surface of the first wire portion. A bottom surface of the first seed pattern may be at a level lower than a top surface of the under-bump pattern.
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公开(公告)号:US12218039B2
公开(公告)日:2025-02-04
申请号:US18311621
申请日:2023-05-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeonggi Jin , Gyuho Kang , Solji Song , Un-Byoung Kang , Ju-Il Choi
IPC: H01L23/48 , H01L23/00 , H01L23/498
Abstract: A semiconductor package may include a redistribution substrate having a first surface and a second surface, opposite to each other, a semiconductor chip on the first surface of the redistribution substrate, and a solder pattern on the second surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern coupled to the solder pattern, a first redistribution pattern on the under-bump pattern, the first redistribution pattern including a first via portion and a first wire portion, and a first seed pattern between the under-bump pattern and the first redistribution pattern and on a side surface of the first via portion and a bottom surface of the first wire portion. A bottom surface of the first seed pattern may be at a level lower than a top surface of the under-bump pattern.
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公开(公告)号:US12107063B2
公开(公告)日:2024-10-01
申请号:US17204313
申请日:2021-03-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Ju-Il Choi , Gyuho Kang , Heewon Kim , Junyoung Park , Seong-Hoon Bae , Jin Ho An
IPC: H01L23/38 , H01L23/00 , H01L23/532 , H01L23/538
CPC classification number: H01L24/14 , H01L23/53238 , H01L23/5386 , H01L2224/0401 , H01L2224/12105 , H01L2224/13024
Abstract: A semiconductor package device may include a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern, which includes including a body portion and a protruding portion extended from the body portion to form a single object, an insulating layer covering a side surface of the body portion, and an outer coupling terminal on the protruding portion. The body portion may have a first diameter in a first direction parallel to the top surface of the redistribution substrate, and the protruding portion may have a second diameter in the first direction, which is smaller than the first diameter. A top surface of the protruding portion may be parallel to the first direction, and a side surface of the protruding portion may be inclined at an angle to a top surface of the body portion.
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15.
公开(公告)号:US20240213133A1
公开(公告)日:2024-06-27
申请号:US18208415
申请日:2023-06-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyungjun PARK , Gyuho Kang , Seong-Hoon Bae , Sang-Hyuck Oh , Kwangok Jeong , Ju-Il Choi
IPC: H01L23/498 , H01L21/48 , H05K1/11 , H05K3/46
CPC classification number: H01L23/49838 , H01L21/4857 , H01L23/49822 , H05K1/113 , H05K3/4644 , H05K2201/10674
Abstract: A redistribution substrate includes first and second insulating layers; a wiring layer, and a metal layer. The wiring pattern includes a via portion penetrating the first insulating layer and a pad portion on the via portion, the pad portion extending onto an upper surface of the first insulating layer. The metal layer covers an upper surface of the wiring pattern. The second insulating layer is provided on the first insulating layer and covers the pad portion and the metal layer. The wiring pattern includes a first metal. The metal layer includes the first metal and a second metal. The metal layer includes a first portion vertically overlapping the pad portion, and a second portion surrounding the first portion, and a concentration of the first metal in the first portion of the metal layer is greater than a concentration of the first metal in the second portion of the metal layer.
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公开(公告)号:US20240047319A1
公开(公告)日:2024-02-08
申请号:US18125348
申请日:2023-03-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jongho PARK , Gyuho Kang , Sung Keun Park , Seong-Hoon Bae , Jaemok Jung , Ju-ll Choi
CPC classification number: H01L23/49811 , H01L23/3128 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/105 , H01L21/4853 , H01L21/563 , H01L25/50 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/48227 , H01L24/48
Abstract: A semiconductor package includes a first substrate, a semiconductor chip on the first substrate, a second substrate spaced apart from the first substrate, a wire spaced apart from a lateral surface of the semiconductor chip and connecting the first substrate to the second substrate, a mold structure on a top surface of the semiconductor chip, the lateral surface of the semiconductor chip, and a lateral surface of the wire, and an under-fill pattern on the lateral surface of the wire and is between the wire and the mold structure.
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公开(公告)号:US11664312B2
公开(公告)日:2023-05-30
申请号:US17147661
申请日:2021-01-13
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ju-Il Choi , Gyuho Kang , Seong-Hoon Bae , Dongjoon Oh , Chungsun Lee , Hyunsu Hwang
IPC: H01L23/532 , H01L23/00 , H01L23/48 , H01L23/522
CPC classification number: H01L23/53238 , H01L23/481 , H01L23/5226 , H01L23/5329 , H01L24/05 , H01L24/08 , H01L24/16 , H01L2224/05647 , H01L2224/08145 , H01L2224/16227
Abstract: A semiconductor device includes a first semiconductor chip that includes a first conductive pad whose top surface is exposed; and a second semiconductor chip that includes a second conductive pad whose top surface is exposed and in contact with at least a portion of the top surface of the first conductive pad. The first semiconductor chip may include a first diffusion barrier in contact with a bottom surface of the first conductive pad, and a second diffusion barrier in contact with a lateral surface of the first conductive pad, and the first diffusion barrier and the second diffusion barrier may include different materials from each other.
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