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公开(公告)号:US20190115527A1
公开(公告)日:2019-04-18
申请号:US16107242
申请日:2018-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeong-Heon Park , Yong Sung Park , Joonmyoung Lee , Hyun Cho , Se Chung Oh
Abstract: Provided are process control methods and process control systems. The method includes performing a deposition process on a lot defined by a group of a plurality of wafers, performing a measurement process on the lot to obtain a measured value with respect to at least one wafer among the plurality of wafers, producing a target value of a factor of a process condition in the deposition process by using a difference between the measured value and a reference value, and providing an input value of the factor with respect to a subsequent lot based on the target value. The operation of providing the input value of the factor includes obtaining a previous target value of the factor previously produced with respect to at least one previous lot, and providing a weighted average of the previous target value and the target value as the input value.
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公开(公告)号:US09184376B2
公开(公告)日:2015-11-10
申请号:US14315610
申请日:2014-06-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Hwan Park , Soonoh Park , Sangyong Kim , Joonmyoung Lee
CPC classification number: H01L43/10 , G11C11/161 , H01L43/08
Abstract: A magnetic memory device may include a substrate and a magnetic tunnel junction memory element on the substrate. The magnetic tunnel junction memory element may include a reference magnetic layer, a tunnel barrier layer, and a free magnetic layer. The reference magnetic layer may include a first pinned layer, an exchange coupling layer, and a second pinned layer. The exchange coupling layer may be between the first and second pinned layers, and the second pinned layer may include a ferromagnetic layer and a non-magnetic layer. The second pinned layer may be between the first pinned layer and the tunnel barrier layer, and the tunnel barrier layer may be between the reference magnetic layer and the free magnetic layer.
Abstract translation: 磁存储器件可以在衬底上包括衬底和磁性隧道结存储元件。 磁性隧道结存储元件可以包括参考磁性层,隧道势垒层和自由磁性层。 参考磁性层可以包括第一固定层,交换耦合层和第二固定层。 交换耦合层可以在第一和第二被钉扎层之间,并且第二被钉扎层可以包括铁磁层和非磁性层。 第二被钉扎层可以在第一被钉扎层和隧道势垒层之间,并且隧道势垒层可以在参考磁性层和自由磁性层之间。
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公开(公告)号:US11535930B2
公开(公告)日:2022-12-27
申请号:US16856539
申请日:2020-04-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Joonmyoung Lee , Whankyun Kim , Eunsun Noh , Jeong-Heon Park , Junho Jeong
Abstract: A sputtering apparatus including a chamber, a gas supply configured to supply the chamber with a first gas and a second inert gas, the first inert gas and the second inert gas having a first evaporation point and second evaporation point, respectively, a plurality of sputter guns in an upper portion of the chamber, a chuck in a lower portion of the chamber and facing the sputter guns, the chuck configured to accommodate a substrate thereon, and a cooling unit connected to a lower portion of the chuck, the cooling unit configured to cool the chuck to a temperature less than the first evaporation point and greater than the second evaporation point, and a method of fabricating a magnetic memory device may be provided.
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公开(公告)号:US10862025B2
公开(公告)日:2020-12-08
申请号:US16434478
申请日:2019-06-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joonmyoung Lee , Ung Hwan Pi , Eunsun Noh , Yong Sung Park
Abstract: A magnetic memory device includes a first magnetic tunnel junction pattern on a substrate, a second magnetic tunnel junction pattern on the first magnetic tunnel junction pattern, and a conductive line between the first magnetic tunnel junction pattern and the second magnetic tunnel junction pattern. The conductive line is configured such that a current flowing through the conductive line flows in parallel to an interface between the conductive line and each of the first and second magnetic tunnel junction patterns.
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公开(公告)号:US09923138B2
公开(公告)日:2018-03-20
申请号:US15375734
申请日:2016-12-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Hwan Park , Kwangseok Kim , Keewon Kim , Jae Hoon Kim , Joonmyoung Lee
CPC classification number: H01L43/08 , G11C11/161 , H01L27/222 , H01L29/82 , H01L43/02 , H01L43/10 , H01L43/12
Abstract: A memory device includes a magnetic tunnel junction comprising a first free layer, a pinned layer, and a tunnel barrier layer disposed between the first free layer and the pinned layer, wherein the first free layer comprises a first free magnetic pattern adjacent to the tunnel barrier layer, and a second free magnetic pattern spaced apart from the tunnel barrier layer with the first free magnetic pattern interposed therebetween, wherein the second free magnetic pattern contacts the first free magnetic pattern, wherein the first and second free magnetic patterns include boron (B), wherein a boron content of the first free magnetic pattern is higher than a boron content of the second free magnetic pattern, and wherein the boron content of the first free magnetic pattern is in a range of about 25 at % to about 50 at %.
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公开(公告)号:US09859488B2
公开(公告)日:2018-01-02
申请号:US15466802
申请日:2017-03-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Joonmyoung Lee , Kwangseok Kim , Ki Woong Kim , Whankyun Kim , Sang Hwan Park
CPC classification number: H01L43/02 , G11C11/161 , H01L27/222 , H01L43/08 , H01L43/10 , H01L43/12
Abstract: A magnetic memory device includes a reference magnetic pattern having a magnetization direction fixed in one direction, a free magnetic pattern having a changeable magnetization direction, and a tunnel barrier pattern disposed between the free and reference magnetic patterns. The free magnetic pattern has a first surface being in contact with the tunnel barrier pattern and a second surface opposite to the first surface. The magnetic memory device further includes a sub-oxide pattern disposed on the second surface of the free magnetic pattern, and a metal boride pattern disposed between the sub-oxide pattern and the second surface of the free magnetic pattern. The magnetization directions of the free and reference magnetic patterns are substantially perpendicular to the first surface of the free magnetic pattern.
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公开(公告)号:US09831422B2
公开(公告)日:2017-11-28
申请号:US14919717
申请日:2015-10-21
Inventor: Woojin Kim , Joonmyoung Lee , Yong Sung Park , Stuart S. P. Parkin
Abstract: A magnetic memory device includes a first magnetic structure on a substrate, a second magnetic structure between the substrate and the first magnetic structure, and a tunnel barrier between the first and second magnetic structures. At least one of the first and second magnetic structures includes a perpendicular magnetic layer on the tunnel barrier, and a polarization enhancement layer interposed between the tunnel barrier and the perpendicular magnetic layer. Here, the polarization enhancement layer contains cobalt, iron, and at least one of the elements of Group IV, and the polarization enhancement layer has a magnetization direction perpendicular to or substantially perpendicular to a top surface of the substrate.
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