公开(公告)号：US11133296B2

公开(公告)日：2021-09-28

申请号：US16698749

申请日：2019-11-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chanhee Jeong ,  Hyunki Kim ,  Junwoo Park ,  Byoung Wook Jang ,  Sunchul Kim ,  Su-Min Park ,  Pyoungwan Kim ,  Inku Kang ,  Heeyeol Kim

IPC: H01L25/10 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00 ,  H01L23/498

Abstract: A semiconductor package includes a semiconductor chip disposed on a first substrate, a mold layer covering a sidewall of the semiconductor chip and including a through-hole, a second substrate disposed on the semiconductor chip, a connection terminal disposed between the first substrate and the second substrate and provided in the through-hole, and an underfill resin layer extending from between the semiconductor chip and the second substrate into the through-hole.

公开(公告)号：US10361177B2

公开(公告)日：2019-07-23

申请号：US15960698

申请日：2018-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Young Kim ,  Pyoungwan Kim ,  Hyunki Kim ,  Junwoo Park ,  Sangsoo Kim ,  Seung Hwan Kim ,  Sung-Kyu Park ,  Insup Shin

IPC: H01L21/56 ,  H01L25/00 ,  H01L25/10 ,  H01L25/11

Abstract: Disclosed are a semiconductor package and a method of fabricating the same. The semiconductor package comprises a lower semiconductor chip on a lower substrate, a lower molding layer covering the lower semiconductor chip on the lower substrate and including a molding cavity that extends toward the lower semiconductor chip from a top surface of the lower molding layer, an interposer substrate on the top surface of the lower molding layer and including a substrate opening that penetrates the interposer substrate and overlaps the molding cavity, and an upper package on the interposer substrate. The molding cavity has a floor surface spaced apart from the upper package across a substantially hollow space.

公开(公告)号：US12288743B2

公开(公告)日：2025-04-29

申请号：US17655573

申请日：2022-03-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junwoo Park ,  Seunghwan Kim ,  Jungjoo Kim ,  Yongkwan Lee ,  Dongju Jang

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package includes a lower substrate that includes a lower wiring layer; a semiconductor chip disposed on the lower substrate, and an upper substrate disposed on the semiconductor chip. The upper substrate includes a lower surface that faces the semiconductor chip, an upper wiring layer, and a plurality of protruding structures disposed below the lower surface. The lower surface of the upper substrate includes a cavity region that overlaps the semiconductor chip in a first direction, and a plurality of channel regions that extend from the cavity region to an edge of the upper substrate. The cavity region and the plurality of channel regions are defined by the plurality of protruding structures.

公开(公告)号：US20230411259A1

公开(公告)日：2023-12-21

申请号：US18110994

申请日：2023-02-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunchul Kim ,  Junwoo Park ,  Hyunggil Baek ,  Yongkwan Lee ,  Juhyung Lee

IPC: H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49811 ,  H01L23/49833 ,  H01L24/16 ,  H01L23/3128 ,  H01L2224/16227 ,  H01L23/49822

Abstract: A semiconductor package includes: a lower substrate; a semiconductor chip disposed on the lower substrate; an upper substrate disposed on the semiconductor chip, having a lower surface facing the semiconductor chip, and including step structures disposed below the lower surface; a connection structure disposed around the semiconductor chip and connecting the lower substrate to the upper substrate; and an encapsulant filling a space between the lower substrate and the upper substrate and sealing at least a portion of each of the semiconductor chip and the connection structure. The lower surface of the upper substrate has a first surface portion on which the step structures are disposed and a second surface portion having a step with respect to the lower surface of the step structures, and the second surface portion extends between opposite edges of the upper substrate.