WASHER AND CONTROL METHOD THEREOF
    12.
    发明申请

    公开(公告)号:US20220372687A1

    公开(公告)日:2022-11-24

    申请号:US17728431

    申请日:2022-04-25

    Abstract: A washer includes a drum, a motor connected to the drum, a motor drive connected to the motor and configured to supply a driving current to the motor to rotate the drum, and a processor connected to the motor drive. The processor is configured to control the motor drive to supply the driving current to the motor to rotate the motor at a target speed and to determine a magnitude of a load accommodated in the drum while controlling a rotational speed of the motor within a predetermined range.

    WASHING MACHINE AND CONTROL METHOD THEREOF

    公开(公告)号:US20220349109A1

    公开(公告)日:2022-11-03

    申请号:US17741572

    申请日:2022-05-11

    Abstract: A washing machine according to an aspect of the disclosure includes: a tub; a drum rotatably provided inside the tub; a heater configured to heat water; a circulating pump configured to circulate a part of the water stored in the tub; a water level sensor configured to sense a water level of water in the tub; and a controller configured to control the circulating pump to circulate the part of the water stored in the tub, and control revolutions per minute (rpm) of a motor of the circulating pump based on a water level of the water while the water stored in the tub circulates and the heater is driven.

    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20220328496A1

    公开(公告)日:2022-10-13

    申请号:US17541790

    申请日:2021-12-03

    Abstract: A semiconductor device includes a first active pattern on a substrate, a pair of first source/drain patterns on the first active pattern and a first channel pattern between the pair of first source/drain patterns, wherein the first channel pattern includes a plurality of semiconductor patterns that are stacked and spaced apart from each other, a first gate electrode on the first channel pattern, a first gate cutting pattern that is adjacent to the first channel pattern and penetrates the first gate electrode, and a first residual pattern between the first gate cutting pattern and the first channel pattern. The first residual pattern covers an outermost sidewall of at least one semiconductor pattern of the plurality of semiconductor patterns of the first channel pattern. The first gate electrode includes, on an upper portion of the first gate electrode, a first extension that vertically overlaps the first residual pattern.

    SEMICONDUCTOR DEVICES AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20220005946A1

    公开(公告)日:2022-01-06

    申请号:US17192301

    申请日:2021-03-04

    Abstract: A semiconductor device includes a substrate including a fin-type active region, the fin-type active region extending in a first direction; a plurality of channel layers on the fin-type active region, the plurality of channel layers including an uppermost channel layer, a lowermost channel layer, and an intermediate channel layer isolated from direct contact with each other in a direction perpendicular to an upper surface of the substrate; a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction; a gate insulating film between the plurality of channel layers and the gate electrode; and source/drain regions electrically connected to the plurality of channel layers. In a cross section taken in the second direction, the uppermost channel layer has a width greater than a width of the intermediate channel layer.

    SEMICONDUCTOR DEVICES AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20240413246A1

    公开(公告)日:2024-12-12

    申请号:US18809745

    申请日:2024-08-20

    Abstract: A semiconductor device includes a substrate including a fin-type active region, the fin-type active region extending in a first direction; a plurality of channel layers on the fin-type active region, the plurality of channel layers including an uppermost channel layer, a lowermost channel layer, and an intermediate channel layer isolated from direct contact with each other in a direction perpendicular to an upper surface of the substrate; a gate electrode surrounding the plurality of channel layers and extending in a second direction intersecting the first direction; a gate insulating film between the plurality of channel layers and the gate electrode; and source/drain regions electrically connected to the plurality of channel layers. In a cross section taken in the second direction, the uppermost channel layer has a width greater than a width of the intermediate channel layer.

    INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20240304666A1

    公开(公告)日:2024-09-12

    申请号:US18667417

    申请日:2024-05-17

    Abstract: An integrated circuit device is provided and includes: a fin-type active region extending in a first horizontal direction on a substrate, a channel region on the fin-type active region, a gate line surrounding the channel region on the fin-type active region and extending in a second horizontal direction crossing the first horizontal direction, an insulating spacer covering a sidewall of the gate line, a source/drain region connected to the channel region on the fin-type active region and including a first portion facing the sidewall of the gate line with the insulating spacer therebetween, an air gap between the insulating spacer and the first portion of the source/drain region, and an insulating liner including a portion in contact with the source/drain region and a portion defining a size of the air gap. A method of manufacturing the integrated circuit device is further provided.

    INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20220293730A1

    公开(公告)日:2022-09-15

    申请号:US17479424

    申请日:2021-09-20

    Abstract: An integrated circuit device includes: a fin-type active region extending in a first horizontal direction on a substrate, a channel region on the fin-type active region, a gate line surrounding the channel region on the fin-type active region and extending in a second horizontal direction crossing the first horizontal direction, an insulating spacer covering a sidewall of the gate line, a source/drain region connected to the channel region on the fin-type active region and including a first portion facing the sidewall of the gate line with the insulating spacer therebetween, an air gap between the insulating spacer and the first portion of the source/drain region, and an insulating liner including a portion in contact with the source/drain region and a portion defining a size of the air gap.

    INTEGRATED CIRCUIT INCLUDING MEMORY CELL AND METHOD OF DESIGNING THE SAME

    公开(公告)号:US20220037339A1

    公开(公告)日:2022-02-03

    申请号:US17371522

    申请日:2021-07-09

    Abstract: An integrated circuit includes: a first wiring layer on which a first bit line pattern and a positive power supply pattern, a first power supply line landing pad, and a first word line landing pad are formed; a second wiring layer on which a first negative power supply pattern connected to the first power supply line landing pad, and a first word line pattern connected to the first word line landing pad are formed; a third wiring layer on which a second negative power supply pattern connected to the first negative power supply pattern, and a second word line landing pad connected to the first word line pattern are formed; and a fourth wiring layer on which a second word line pattern, connected to the second word line landing pad, are formed.

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