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    Image sensor having reduced parasitic capacitance
    14.
    发明授权
    Image sensor having reduced parasitic capacitance 有权

    公开(公告)号：US11606523B2

    公开(公告)日：2023-03-14

    申请号：US16890422

    申请日：2020-06-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sunyool Kang ,  Yongjun Cho ,  Yunhwan Jung ,  Heesung Chae ,  Kyungmin Kim ,  Haesick Sul ,  Sukki Yoon

    IPC: H04N5/3745 ,  H01L27/146

    Abstract: An image sensor, including a pixel array including a plurality of pixels connected to row lines extending in a first direction and column lines extending in a second direction intersecting the first direction; a ramp voltage generator configured to output a ramp voltage; a sampling circuit including a plurality of comparators, each comparator of the plurality of comparators having a first input terminal connected to a column of the column lines and a second input terminal configured to receive the ramp voltage; and an analog-to-digital converter configured to convert an output of the plurality of comparators to a digital signal, wherein the plurality of comparators include a first comparator connected to a first column line, and a second comparator connected to a second column line adjacent to the first column line in the first direction, wherein each of the first comparator and the second comparator includes a first transistor and a second transistor disposed sequentially in the second direction, and wherein a gap between the first transistor of the first comparator and the second transistor of the first comparator is different from a gap between the first transistor of the second comparator and the second transistor of the second comparator.

    Comparison circuit including input sampling capacitor and image sensor including the same
    15.
    发明授权
    Comparison circuit including input sampling capacitor and image sensor including the same 有权

    公开(公告)号：US11581255B2

    公开(公告)日：2023-02-14

    申请号：US17192408

    申请日：2021-03-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yunhwan Jung ,  Sunyool Kang ,  Jaehong Kim

    IPC: H01L23/522 ,  H04N5/357 ,  H04N5/378 ,  H03K4/08 ,  H01L27/08

    Abstract: A comparison circuit that includes an input sampling capacitor and an image sensor including the same are provided. The comparison circuit includes an amplifier configured to receive a pixel signal and a ramp signal to perform a correlated double sampling operation, a first pixel capacitor connected to the amplifier through a first floating node and configured to transmit the pixel signal, a first ramp capacitor connected to the amplifier through a second floating node and configured to transmit the ramp signal, a second pixel capacitor connected in parallel to the first pixel capacitor, and a second ramp capacitor connected in parallel to the first ramp capacitor, wherein the second pixel capacitor is formed between the first floating node and first peripheral routing lines, and the second ramp capacitor is formed between the second floating node and second peripheral routing lines.

    Electronic circuit for configuring amplifying circuit configured to output voltage including low noise
    16.
    发明授权
    Electronic circuit for configuring amplifying circuit configured to output voltage including low noise 有权

    公开(公告)号：US11503239B2

    公开(公告)日：2022-11-15

    申请号：US16822930

    申请日：2020-03-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sunyool Kang ,  Yunhwan Jung ,  Heesung Chae ,  Sukki Yoon ,  Yongjun Cho

    IPC: H04N5/378 ,  G05F1/46 ,  G05F1/56 ,  G05F3/26 ,  H03F3/45 ,  H04N5/357

    Abstract: An electronic circuit is provided. The electronic circuit includes a first current generating circuit configured to output a first operating current based on a first operating voltage; and an input circuit configured to: receive a first current corresponding to a first input voltage and a second current corresponding to a second input voltage, wherein the first current and the second current are based on the first operating current; receive a third current and a fourth current that are generated based on the first operating voltage; and generate a fifth current corresponding to the second input voltage based on a second operating current. The electronic circuit is configured to generate an output voltage that is associated with a difference between the first input voltage and the second input voltage based on the second current, the fourth current and the fifth current, and the fourth current corresponds to the third current.

    IMAGE SENSING SYSTEM AND OPERATING METHOD THEREOF
    17.
    发明申请
    IMAGE SENSING SYSTEM AND OPERATING METHOD THEREOF 有权

    公开(公告)号：US20220006966A1

    公开(公告)日：2022-01-06

    申请号：US17464273

    申请日：2021-09-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： HEESUNG CHAE ,  Yunhwan Jung ,  Kyung-Min Kim ,  Kyungtae Kim

    IPC: H04N5/357 ,  H03M1/12 ,  H04N5/369

    Abstract: An image sensing system includes a pixel array, an analog-to-digital converter circuit, and an average calculator. The analog-to-digital converter circuit converts a first pixel signal to first pixel data and converts a second pixel signal to second pixel data. The average calculator generates a first average bit based on a first bit of the first pixel data and a first bit of the second pixel data during a first time and generates a second average bit based on a second bit of the first pixel data and a second bit of the second pixel data during a second time.

    Image sensor including pixel array
    18.
    发明授权
    Image sensor including pixel array 有权

    公开(公告)号：US12143739B2

    公开(公告)日：2024-11-12

    申请号：US17857812

    申请日：2022-07-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yunhong Kim ,  Yunhwan Jung ,  Heesung Chae ,  Mooyoung Kim ,  Haesick Sul

    IPC: H04N25/75 ,  H04N25/63 ,  H04N25/633

    Abstract: An image sensor may include a pixel array a pixel array including an active pixel and an optical black pixel, the active pixel configured to generate a first pixel signal, and the optical black pixel configured to generate a second pixel signal, a first biasing circuit configured to bias the first pixel signal based on a first bias voltage, a first analog-to-digital converter configured to convert the biased first pixel signal into a first digital signal, a second biasing circuit configured to bias the second pixel signal based on a second bias voltage, and a second analog-to-digital converter configured to convert the biased second pixel signal into a second digital signal, the second digital signal configured to generate smaller random noise than the first analog-to-digital converter.

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