公开(公告)号：US06339596B1

公开(公告)日：2002-01-15

申请号：US08906909

申请日：1997-08-06

申请人： Takahiko Kozaki ,  Junichirou Yanagi ,  Kiyoshi Aiki ,  Yutaka Ito ,  Kaoru Aoki ,  Shinobu Gohara

发明人： Takahiko Kozaki ,  Junichirou Yanagi ,  Kiyoshi Aiki ,  Yutaka Ito ,  Kaoru Aoki ,  Shinobu Gohara

IPC分类号： H04L1256

CPC分类号： H04L12/5601 ,  H04J3/247 ,  H04L12/5602 ,  H04L45/04 ,  H04L49/108 ,  H04L49/203 ,  H04L49/255 ,  H04L49/256 ,  H04L49/3081 ,  H04L2012/5627 ,  H04L2012/5631 ,  H04L2012/5638 ,  H04L2012/5649 ,  H04L2012/565 ,  H04L2012/5651 ,  H04L2012/5652 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04L2012/568 ,  H04L2012/5681 ,  H04L2012/5682 ,  H04Q11/0478

摘要： An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory. The buffer memory control circuit has a control table device for outputting an identifier of an output line to which the cells read from the shared buffer memory are to be outputted, and cells are read from the chain designated by the output line identifier outputted from the control table device.

公开(公告)号：US4712742A

公开(公告)日：1987-12-15

申请号：US798524

申请日：1985-11-15

申请人： Takayuki Ogawa ,  Hideaki Ito ,  Naokazu Kimura ,  Hayami Ito ,  Shuhei Tatsumi ,  Shoichi Takao ,  Nitaro Suzuki ,  Takashi Watanabe ,  Kunizo Shinano ,  Takashi Kuwabara ,  Kaoru Aoki

发明人： Takayuki Ogawa ,  Hideaki Ito ,  Naokazu Kimura ,  Hayami Ito ,  Shuhei Tatsumi ,  Shoichi Takao ,  Nitaro Suzuki ,  Takashi Watanabe ,  Kunizo Shinano ,  Takashi Kuwabara ,  Kaoru Aoki

IPC分类号： C10L1/32 ,  B02C19/12

CPC分类号： C10L1/326

摘要： The present invention relates to a process for preparing a coal-water slurry comprising the steps of screening coal into a coarse-grained coal and a fine-grained coal; subjecting said coarse-grained coal to gravity classification to classify into a low ash coal, a middle ash coal and a high ash coal; wet grinding a mixture of the fine-grained coal, the middle ash coal and part of the low ash coal, and subjecting same to flotation; preparing a first slurry having a solid concentration of 40-60 wt. % from the low ash froth resultant from flotation; and mixing another part of the low ash coal with this first slurry and wet grinding this mixture. This process can accord the solid concentration of the product slurry with an optional target value by adjusting the amount of the low ash coal mixed with the first slurry, and can use the remaining low ash coal not to be added to the first slurry for the purpose of preparing the second product slurry.

摘要翻译： 本发明涉及一种制备煤 - 水浆料的方法，包括将煤筛分成粗粒煤和细粒煤的步骤; 对所述粗粒煤进行重力分级，分为低灰分煤，中灰煤和高灰分煤; 湿法研磨细粒煤，中灰煤和部分低灰煤的混合物，并对其进行浮选; 制备固体浓度为40-60重量％的第一浆料。 来自浮选产生的低灰分泡沫的％; 并将另一部分低灰分煤与该第一浆料混合并湿磨研磨该混合物。 该方法可以通过调节与第一浆料混合的低灰分煤的量，使产品浆料的固体浓度与任选的目标值相一致，并且可以将剩余的低灰分煤添加到第一浆料中用于目的 制备第二产品浆料。

公开(公告)号：US10568272B1

公开(公告)日：2020-02-25

申请号：US16516458

申请日：2019-07-19

申请人： Kaoru Aoki

发明人： Kaoru Aoki

IPC分类号： A01G7/04 ,  F21K9/00 ,  F21Y105/12 ,  F21Y113/10 ,  F21Y115/10

摘要： A light-emitting apparatus of a cultivation system includes a first light source array and a second light source array adjacent to the first light source array. The first light source array includes first light sources and second light sources. The first and second light sources are arranged in a specific pattern in a predetermined direction. The second light source array includes first light sources and second light sources. The first and second light sources of the second light source array are arranged in the specific pattern in the predetermined direction such that an arrangement of colors of the first and second light sources in the second light source array is shifted from an arrangement of colors of the first and second light sources in the first light source array.

公开(公告)号：US06832863B2

公开(公告)日：2004-12-21

申请号：US10458719

申请日：2003-06-09

申请人： Kenji Sugimoto ,  Minobu Matsunaga ,  Masakazu Sanada ,  Katsushi Yoshioka ,  Kaoru Aoki ,  Moritaka Yano ,  Satoshi Yamamoto ,  Tsuyoshi Mitsuhashi ,  Takashi Nagao ,  Mitsumasa Kodama

发明人： Kenji Sugimoto ,  Minobu Matsunaga ,  Masakazu Sanada ,  Katsushi Yoshioka ,  Kaoru Aoki ,  Moritaka Yano ,  Satoshi Yamamoto ,  Tsuyoshi Mitsuhashi ,  Takashi Nagao ,  Mitsumasa Kodama

IPC分类号： G03D500

CPC分类号： H01L21/67173 ,  G03F7/70691 ,  H01L21/67178 ,  H01L21/67184 ,  H01L21/67276 ,  Y10S414/135 ,  Y10S414/14

摘要： A series of substrate transport paths for transporting substrates is arranged on upper and lower stories. Substrates are transferable between the substrate transport path on the first story and the substrate transport path on the second story. The paths include a going-only path for transporting the substrates forward, and a return-only path for transporting the substrates in the opposite direction, these paths being arranged on the upper and lower stories. An indexer connects one end of the substrate transport path on one story to one end of the substrate transport path on the other story. An interface connects the other end of the substrate transport path on one story to the other end of the substrate transport path on the other story. This construction efficiently reduces a waiting time due to interference between the substrates transported along the going-only path and the substrates transported along the return-only path.

摘要翻译： 用于传送基板的一系列基板传送路径被布置在上层和下层。 基底可以在第一层的基底输送路径和第二层的基底输送路径之间转移。 这些路径包括用于向前传送基板的唯一路径，以及用于沿相反方向传送基板的返回路径，这些路径布置在上部和下部故事物上。 分度器将另一个故事的基底传送路径的一端连接到基底传送路径的一端。 一个界面将一个故事的基板传送路径的另一端连接到另一个故事的基板传送路径的另一端。 这种构造有效地减少了由沿着仅路径传送的基板与沿着返回路径传送的基板之间的干涉导致的等待时间。

公开(公告)号：US06330240B1

公开(公告)日：2001-12-11

申请号：US09351125

申请日：1999-07-12

申请人： Takahiko Kozaki ,  Junichirou Yanagi ,  Kiyoshi Aiki ,  Yutaka Ito ,  Kaoru Aoki

发明人： Takahiko Kozaki ,  Junichirou Yanagi ,  Kiyoshi Aiki ,  Yutaka Ito ,  Kaoru Aoki

IPC分类号： H04L1256

CPC分类号： H04L12/5601 ,  H04J3/247 ,  H04L12/5602 ,  H04L45/04 ,  H04L49/108 ,  H04L49/203 ,  H04L49/255 ,  H04L2012/565 ,  H04L2012/5652 ,  H04L2012/5672 ,  H04L2012/5681 ,  H04Q11/0478

摘要： An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory. The buffer memory control circuit has a control table device for outputting an identifier of an output line to which the cells read from the shared buffer memory are to be outputted, and cells are read from the chain designated by the output line identifier outputted from the control table device.

摘要翻译： ATM交换系统包括具有多个输入端口和具有相同信元传输速率的多个输出端口的开关单元，以及多路复用器，用于将从至少两个输出端口输出的单元列复用为单个单元列，并输出该单元 训练到高速输出线（和/或解复用器，用于从输出端口多路复用到多个单元列，并将单元列输出到多个低速输出线）。 开关单元包括缓冲存储器，用于临时存储从输入端口输入的单元，同时形成用于每个单元将被输出到的每个输出线的队列链;解复用器，用于将从缓冲存储器读取的单元在输出端口之中分配 以及缓冲存储器控制电路，用于通过共享缓冲存储器来控制单元的写入和读取操作。 缓冲存储器控制电路具有用于输出要从共享缓冲存储器读取的单元被输出的输出行的标识符的控制表装置，并且从由控制器输出的输出行标识符指定的链中读取单元 表装置。

公开(公告)号：US5365519A

公开(公告)日：1994-11-15

申请号：US845668

申请日：1992-03-04

申请人： Takahiko Kozaki ,  Junichirou Yanagi ,  Kiyoshi Aiki ,  Yutaka Ito ,  Kaoru Aoki

发明人： Takahiko Kozaki ,  Junichirou Yanagi ,  Kiyoshi Aiki ,  Yutaka Ito ,  Kaoru Aoki

IPC分类号： H04J3/24 ,  H04L12/56 ,  H04Q11/04

CPC分类号： H04L12/5601 ,  H04J3/247 ,  H04L12/5602 ,  H04L45/04 ,  H04L49/108 ,  H04L49/203 ,  H04L49/255 ,  H04L49/256 ,  H04L49/3081 ,  H04Q11/0478 ,  H04L2012/5627 ,  H04L2012/5631 ,  H04L2012/5638 ,  H04L2012/5649 ,  H04L2012/565 ,  H04L2012/5651 ,  H04L2012/5652 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04L2012/568 ,  H04L2012/5681 ,  H04L2012/5682

摘要： An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory. The buffer memory control circuit has a control table device for outputting an identifier of an output line to which the cells read from the shared buffer memory are to be outputted, and cells are read from the chain designated by the output line identifier outputted from the control table device.

摘要翻译： ATM交换系统包括具有多个输入端口和具有相同信元传输速率的多个输出端口的开关单元，以及多路复用器，用于将从至少两个输出端口输出的单元列复用为单个单元列，并输出该单元 训练到高速输出线（和/或解复用器，用于从输出端口多路复用到多个单元列，并将单元列输出到多个低速输出线）。 开关单元包括缓冲存储器，用于临时存储从输入端口输入的单元，同时形成用于每个单元将被输出到的每个输出线的队列链;解复用器，用于将从缓冲存储器读取的单元在输出端口之中分配 以及缓冲存储器控制电路，用于通过共享缓冲存储器来控制单元的写入和读取操作。 缓冲存储器控制电路具有用于输出要从共享缓冲存储器读取的单元被输出的输出行的标识符的控制表装置，并且从由控制器输出的输出行标识符指定的链中读取单元 表装置。

公开(公告)号：US4768493A

公开(公告)日：1988-09-06

申请号：US728516

申请日：1985-04-29

申请人： Shoichi Ohtaka ,  Yukio Kondo ,  Kaoru Aoki ,  Masayuki Kumada ,  Takashi Iwashita

发明人： Shoichi Ohtaka ,  Yukio Kondo ,  Kaoru Aoki ,  Masayuki Kumada ,  Takashi Iwashita

IPC分类号： F01M5/00 ,  F01M13/00 ,  F01M13/02 ,  F01M13/04 ,  F01P3/20 ,  F02M25/06 ,  F02M31/10

CPC分类号： F01P3/20 ,  F01M13/00 ,  F02M25/06 ,  F02M31/10 ,  F01M13/023 ,  F01M13/04 ,  F01M2013/0027 ,  F01M2013/0455 ,  F01M2013/0472 ,  F01M5/002 ,  F01P2060/00 ,  F02B2275/20 ,  Y02T10/121 ,  Y02T10/126

摘要： An arrangement for heating the blow-by gas system of a water cooled type internal combustion engine by providing engine coolant conduits in heat exchange relationship with the blow-by gas hoses and PCV valve. In one embodiment a water jacket surrounds the PCV valve. The heat exchangers between the blow-by gas system hoses and the coolant hoses are parallel adjacent conduits in one embodiment and concentric conduits in another embodiment.

摘要翻译： 一种用于通过提供与窜气软管和PCV阀热交换关系的发动机冷却剂管道来加热水冷式内燃机的窜气系统的装置。 在一个实施例中，水套围绕PCV阀。 在一个实施例中，窜气系统软管和冷却剂软管之间的热交换器是平行相邻的管道，在另一个实施例中是同心管道。

公开(公告)号：US08191808B2

公开(公告)日：2012-06-05

申请号：US12567290

申请日：2009-09-25

申请人： Tetsuya Tanaka ,  Masahiro Kawamoto ,  Akio Matsui ,  Hiroki Morioka ,  Kaoru Aoki

发明人： Tetsuya Tanaka ,  Masahiro Kawamoto ,  Akio Matsui ,  Hiroki Morioka ,  Kaoru Aoki

IPC分类号： B02C19/06

CPC分类号： B02C19/068

摘要： A fluid spray nozzle for spraying fluid, satisfying a formula (r−r0)≦L tan 35°, wherein r0 is a radius of a section having a minimum area of the nozzle when cut perpendicular to a spray direction of the fluid; and r is a radius of cross-sections of an upstream side and a downstream side of the spray direction from the section having a minimum area with a distance of L.

摘要翻译： 用于喷射流体的流体喷嘴，满足公式（r-r0）＆nlE; L tan 35°，其中r0是垂直于流体喷射方向切割时具有喷嘴最小面积的截面的半径; r为距离为L的最小面积的部分的喷射方向的上游侧和下游侧的横截面的半径。

公开(公告)号：US20110315607A1

公开(公告)日：2011-12-29

申请号：US13254505

申请日：2010-03-02

申请人： Tetsuya Tanaka ,  Hiroki Morioka ,  Kaoru Aoki ,  Makoto Hirai ,  Shinya Hanatani

发明人： Tetsuya Tanaka ,  Hiroki Morioka ,  Kaoru Aoki ,  Makoto Hirai ,  Shinya Hanatani

IPC分类号： B07B7/083

CPC分类号： B07B4/02 ,  B07B4/025 ,  B07B7/083 ,  B07B9/02 ,  G03G9/0817

摘要： A classifying apparatus including: a rotor with a plurality of annularly disposed blades, which rotates; and a louver with a plurality of blades which are disposed at an outer circumferential portion of the rotor so as to supply from the outer circumferential portion a fluid for dispersing and classifying a powder material, wherein the powder material is supplied to a gap between the rotor and the louver and centrifugally classified into fine powder and coarse powder, and wherein at least one of the following relationships is satisfied: Relationship (1): α≧50° Relationship (2): D2/D1≧1.17 where a denotes an angle formed between imaginary lines connecting the center of the rotor with both ends of each blade of the louver, D1 denotes a diameter of the rotor, and D2 denotes an inner diameter of the louver.

摘要翻译： 一种分选装置，包括：转子，其具有旋转的多个环形设置的叶片; 以及具有多个叶片的百叶窗，其设置在所述转子的外周部，以从所述外周部分供给用于分散和分类粉末材料的流体，其中所述粉末材料被供应到所述转子 和百叶窗离心分类为细粉末和粗粉末，其中满足以下关系中的至少一个：关系（1）：α≥50°关系式（2）：D2 /D1≥1.17其中a表示形成的角度 在将转子中心与百叶窗的每个叶片的两端连接的假想线之间，D1表示转子的直径，D2表示百叶窗的内径。

公开(公告)号：US06558053B2

公开(公告)日：2003-05-06

申请号：US10125229

申请日：2002-04-18

申请人： Kazuhito Shigemori ,  Masakazu Sanada ,  Minobu Matsunaga ,  Katsushi Yoshioka ,  Kenji Sugimoto ,  Kaoru Aoki ,  Moritaka Yano ,  Satoshi Yamamoto ,  Tsuyoshi Mitsuhashi ,  Takashi Nagao ,  Mitsumasa Kodama ,  Yukihiko Inagaki ,  Yoshihisa Yamada

发明人： Kazuhito Shigemori ,  Masakazu Sanada ,  Minobu Matsunaga ,  Katsushi Yoshioka ,  Kenji Sugimoto ,  Kaoru Aoki ,  Moritaka Yano ,  Satoshi Yamamoto ,  Tsuyoshi Mitsuhashi ,  Takashi Nagao ,  Mitsumasa Kodama ,  Yukihiko Inagaki ,  Yoshihisa Yamada

IPC分类号： G03D500

CPC分类号： H01L21/67161 ,  H01L21/6715 ,  H01L21/67167 ,  H01L21/67178

摘要： A substrate processing apparatus includes a coating section, a developing section, a heat-treating section and a transport mechanism. The coating section has first processing units each for performing a coverage process to supply a photoresist solution to a substrate and cover a surface of the substrate with the photoresist solution, a second processing unit for spinning the substrate, after the coverage process, at high speed to make the photoresist solution into a film, dry the photoresist film, and clean the substrate. All substrates are processed with the same coating conditions to suppress differences in quality among the substrates. The first and second processing units perform the respective processes concurrently to improve the throughput of substrate processing.