公开(公告)号：US20150243574A1

公开(公告)日：2015-08-27

申请号：US14256496

申请日：2014-04-18

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chi-Liang Shih ,  Hsin-Lung Chung ,  Te-Fang Chu ,  Sheng-Ming Yang ,  Hung-Cheng Chen ,  Chia-Yang Chen

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/498 ,  H01L21/56

CPC classification number: H01L23/49838 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/50 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/46 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32268 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83385 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.

Abstract translation: 提供了一种制造半导体封装的方法，其包括以下步骤：提供具有多个焊盘和相对的第二表面的具有第一表面的封装基板; 在所述包装基板的第一表面上设置多个无源元件; 通过粘合膜将半导体芯片设置在无源元件上; 通过多个接合线电连接半导体芯片和接合焊盘; 以及在所述封装衬底的所述第一表面上形成密封剂以封装所述半导体芯片，所述无源元件和所述接合线。 通过在封装基板和半导体芯片之间配置无源元件，本发明节约了封装基板上的空间，增加了布线灵活性。 此外，由于接合线不容易与无源元件接触，所以本发明防止发生短路。

公开(公告)号：US20190115330A1

公开(公告)日：2019-04-18

申请号：US16211714

申请日：2018-12-06

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chi-Liang Shih ,  Chun-Chong Chien ,  Hsin-Lung Chung ,  Te-Fang Chu

IPC: H01L25/16 ,  H01L23/552 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L25/16 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49816 ,  H01L23/5383 ,  H01L23/552 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/81

Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.

公开(公告)号：US09526171B2

公开(公告)日：2016-12-20

申请号：US14564180

申请日：2014-12-09

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chi-Liang Shih ,  Hsin-Lung Chung ,  Te-Fang Chu ,  Hao-Ju Fang ,  Kuang-Neng Chung

IPC: H01L23/10 ,  H05K1/11 ,  H01L23/31 ,  H01L21/56

CPC classification number: H05K1/111 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/58 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A package structure is provided, which includes: a substrate having opposite first and second surfaces; at least an electronic element disposed on the first surface of the substrate; and an encapsulant formed on the first surface of the substrate for encapsulating the electronic element. The encapsulant has a non-rectangular shape so as to reduce an ineffective space in the encapsulant.

Abstract translation: 提供了一种封装结构，其包括：具有相对的第一和第二表面的基板; 至少设置在所述基板的第一表面上的电子元件; 以及形成在所述基板的所述第一表面上以封装所述电子元件的密封剂。 密封剂具有非矩形形状，以减少密封剂中的无效空间。

公开(公告)号：US20140264958A1

公开(公告)日：2014-09-18

申请号：US13968834

申请日：2013-08-16

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Tsung-Hsien Hsu ,  Hsin-Lung Chung ,  Te-Fang Chu ,  Kwok-Yan Lam ,  Shao-Meng Sim

IPC: H01L23/29 ,  H01L21/56

CPC classification number: H01L23/295 ,  H01L23/291 ,  H01L24/19 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package is disclosed, which includes: a substrate body; a semiconductor element disposed on the substrate body; and a molding compound forms on the substrate body for encapsulating the semiconductor element. The molding compound contains a metal oxide so as to have a high insulation impedance and a high heat dissipating rate and be capable of suppressing electromagnetic interference.

Abstract translation: 公开了一种半导体封装，其包括：基板主体; 设置在所述基板主体上的半导体元件; 并且在用于封装半导体元件的基板主体上形成模塑料。 模塑料含有金属氧化物以具有高绝缘阻抗和高散热率并且能够抑制电磁干扰。