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11.发明公开公开(公告)号：US20230369094A1
公开(公告)日：2023-11-16
申请号：US18358948
申请日：2023-07-26
发明人： Cheng-Shiuan Wong , Chih-Chiang Tsao , Chao-Wei Chiu , Hao-Jan Pei , Wei-Yu Chen , Hsiu-Jen Lin , Ching-Hua Hsieh , Chia-Shen Cheng
IPC分类号： H01L21/683 , H01L23/00 , H01L21/687 , H01L21/56
CPC分类号： H01L21/6838 , H01L24/03 , H01L21/6836 , H01L21/68721 , H01L21/56 , H01L2224/0231 , H01L2224/02379
摘要： A method of handling a workpiece includes the following steps. A workpiece is placed on a chuck body, wherein the workpiece includes a tape carrier extending beyond a periphery of the chuck body and a workpiece body disposed on the tape carrier, and the chuck body includes a seal ring surrounding the periphery of the chuck body; the tape carrier is clamped outside the chuck body, wherein the tape carrier leans against the seal ring and an enclosed space is formed between the chuck body, the tape carrier and the seal ring; and a vacuum seal is formed by evacuating gas from the enclosed space to pull the periphery of the workpiece toward the chuck body.
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公开(公告)号：US20230360949A1
公开(公告)日：2023-11-09
申请号：US18356212
申请日：2023-07-20
IPC分类号： H01L21/683 , H01L21/82 , H01L21/56 , H01L23/00
CPC分类号： H01L21/6836 , H01L21/82 , H01L21/568 , H01L24/05 , H01L24/13 , H01L2224/10122 , H01L2221/68386 , H01L2221/68377 , H01L2224/0231 , H01L2224/02381 , H01L2221/6834
摘要： A semiconductor package includes a semiconductor device, an encapsulating material encapsulating the semiconductor device, and a redistribution structure disposed over the encapsulating material and the semiconductor device. The semiconductor device includes conductive bumps and a dielectric film encapsulating the conductive bumps, where a material of the dielectric film comprises an epoxy resin and a filler. The conductive bumps are isolated from the encapsulating material by the dielectric film. The redistribution structure is electrically connected to the conductive bumps.
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公开(公告)号：US20230347561A1
公开(公告)日：2023-11-02
申请号：US18346850
申请日：2023-07-04
发明人： Sheng-Feng Weng , Ching-Hua Hsieh , Chung-Shi Liu , Chih-Wei Lin , Sheng-Hsiang Chiu , Yao-Tong Lai , Chia-Min Lin
CPC分类号： B29C45/14655 , H01L21/565 , B29C45/03 , B29C45/0025
摘要： A molding apparatus is configured for molding a semiconductor device and includes a lower mold and an upper mold. The lower mold is configured to carry the semiconductor device. The upper mold is disposed above the lower mold for receiving the semiconductor device and includes a mold part and a dynamic part. The mold part is configured to cover the upper surface of the semiconductor device. The dynamic part is disposed around a device receiving region of the upper mold and configured to move relatively to the mold part. A molding method and a molded semiconductor device are also provided.
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公开(公告)号：US11776838B2
公开(公告)日：2023-10-03
申请号：US17525975
申请日：2021-11-15
IPC分类号： H01L21/683 , H01L21/82 , H01L21/56 , H01L23/00
CPC分类号： H01L21/6836 , H01L21/568 , H01L21/82 , H01L24/05 , H01L24/13 , H01L2221/6834 , H01L2221/68377 , H01L2221/68386 , H01L2224/0231 , H01L2224/02381 , H01L2224/10122
摘要： A semiconductor package includes a semiconductor device, an encapsulating material encapsulating the semiconductor device, and a redistribution structure disposed over the encapsulating material and the semiconductor device. The semiconductor device includes an active surface having conductive bumps and a dielectric film encapsulating the conductive bumps, where a material of the dielectric film comprises an epoxy resin and a filler. The conductive bumps are isolated from the encapsulating material by the dielectric film, and the redistribution structure is electrically connected to the conductive bumps. A manufacturing method of a semiconductor package is also provided.
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公开(公告)号：US11731327B2
公开(公告)日：2023-08-22
申请号：US17876595
申请日：2022-07-29
发明人： Sheng-Feng Weng , Ching-Hua Hsieh , Chung-Shi Liu , Chih-Wei Lin , Sheng-Hsiang Chiu , Yao-Tong Lai , Chia-Min Lin
CPC分类号： B29C45/14655 , B29C45/0025 , B29C45/03 , H01L21/565
摘要： A molding apparatus is configured for molding a semiconductor device and includes a lower mold and an upper mold. The lower mold is configured to carry the semiconductor device. The upper mold is disposed above the lower mold for receiving the semiconductor device and includes a mold part and a dynamic part. The mold part is configured to cover the upper surface of the semiconductor device. The dynamic part is disposed around a device receiving region of the upper mold and configured to move relatively to the mold part. A molding method and a molded semiconductor device are also provided.
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公开(公告)号：US11721659B2
公开(公告)日：2023-08-08
申请号：US17360681
申请日：2021-06-28
发明人： Hao-Jan Pei , Chih-Chiang Tsao , Wei-Yu Chen , Hsiu-Jen Lin , Ming-Da Cheng , Ching-Hua Hsieh , Chung-Shi Liu
IPC分类号： H01L23/00 , H01L25/00 , H01L21/56 , H01L25/10 , H01L23/29 , H01L23/31 , H01L21/683 , H01L25/11
CPC分类号： H01L24/19 , H01L21/565 , H01L21/6835 , H01L23/293 , H01L23/3128 , H01L24/13 , H01L24/25 , H01L24/73 , H01L24/96 , H01L25/105 , H01L25/115 , H01L2221/68345 , H01L2221/68368 , H01L2224/13024 , H01L2224/19 , H01L2224/2518 , H01L2224/25171 , H01L2224/73209 , H01L2225/1035 , H01L2225/1058 , H01L2924/3511
摘要： A package structure is provided. The package structure includes a semiconductor die and a molding compound layer surrounding the semiconductor die. The package structure also includes a conductive bump over the molding compound layer and a first polymer-containing layer surrounding and in contact with the conductive bump. The package structure further includes a second polymer-containing layer disposed over the first polymer-containing layer. A bottom surface of the conductive bump is below a bottom surface of the second polymer-containing layer.
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公开(公告)号：US11688725B2
公开(公告)日：2023-06-27
申请号：US17578372
申请日：2022-01-18
发明人： Sheng-Chieh Yang , Ching-Hua Hsieh , Chih-Wei Lin , Yu-Hao Chen
IPC分类号： H01L25/00 , H01L25/16 , H01L23/498
CPC分类号： H01L25/167 , H01L23/49822
摘要： A semiconductor package includes a photonic integrated circuit, an electronic integrated circuit and a waveguide. The photonic integrated circuit includes an optical coupler. The electronic integrated circuit is disposed aside the photonic integrated circuit. The waveguide is optically coupled to the optical coupler, wherein the waveguide is disposed at an edge of the photonic integrated circuit and protrudes from the edge of the photonic integrated circuit.
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公开(公告)号：US20230187383A1
公开(公告)日：2023-06-15
申请号：US18164554
申请日：2023-02-03
发明人： Yu-Wei Lin , Chun-Yen Lan , Tzu-Ting Chou , Tzu-Shiun Sheu , Chih-Wei Lin , Shih-Peng Tai , Wei-Cheng Wu , Ching-Hua Hsieh
IPC分类号： H01L23/00 , H01L23/16 , H01L23/367 , H01L23/538 , H01L21/48
CPC分类号： H01L23/562 , H01L23/16 , H01L23/3672 , H01L23/5383 , H01L21/4871 , H01L23/5389 , H01L21/4853 , H01L21/4857 , H01L23/5386
摘要： A semiconductor device includes a circuit substrate, a semiconductor package, and a package frame. The semiconductor package is disposed on the circuit substrate. The package frame is disposed over the circuit substrate. The package frame encircles the semiconductor package. The semiconductor package has a first surface facing the circuit substrate and a second surface opposite to the first surface. The package frame leaves exposed at least a portion of the second surface of the semiconductor package. The package frame forms a cavity, which cavity encircles the semiconductor package.
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公开(公告)号：US20230168451A1
公开(公告)日：2023-06-01
申请号：US18162712
申请日：2023-02-01
发明人： Chia-Lun Chang , Ching-Hua Hsieh , Cheng-Ting Chen , Hsiu-Jen Lin , Hsuan-Ting Kuo , Chia-Shen Cheng , Chih-Chiang Tsao
IPC分类号： G02B6/42 , H01L23/538 , H01L25/18 , H01L23/31 , H01L23/00 , H01L25/00 , H01L21/683 , H01L21/56 , G02B6/43 , H05K1/18 , H05K1/02
CPC分类号： G02B6/428 , H01L23/5386 , G02B6/4214 , H01L25/18 , H01L23/3128 , H01L24/24 , H01L25/50 , H01L24/82 , H01L21/6835 , H01L21/561 , H01L24/96 , G02B6/4253 , H01L21/565 , G02B6/43 , H05K1/181 , H05K1/0274 , H05K2201/2054 , H05K2201/10121 , H01L2224/95001 , H01L21/568 , H01L2224/821 , H05K2201/10151 , H01L2224/82005 , H01L2221/68359 , H01L2221/68372 , H01L2221/68381 , H01L2224/215 , H01L2224/24225 , H01L2924/12042 , H01L2924/12043
摘要： In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.
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公开(公告)号：US11532564B2
公开(公告)日：2022-12-20
申请号：US17121089
申请日：2020-12-14
发明人： Yi-Da Tsai , Cheng-Ping Lin , Wei-Hung Lin , Chih-Wei Lin , Ming-Da Cheng , Ching-Hua Hsieh , Chung-Shi Liu
IPC分类号： H01L23/538 , H01L21/56 , H01L21/48 , H01L21/683 , H01L23/29 , H01L23/31 , H01L23/00 , H01L25/00 , H01L25/065
摘要： Package structures and methods for forming the same are provided. The package structure includes an integrated circuit die and a package layer surrounding the integrated circuit die. The package structure also includes a redistribution structure over the package layer and electrically connected to the integrated circuit die. The redistribution structure includes a passivation layer and a conductive layer formed in the passivation layer. The integrated circuit die further includes a connector formed over the conductive layer and covered a top surface of the passivation layer. In addition, a bottom surface of the connector and a top surface of the connector are both wider than a neck portion of the connector.
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