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    PROXIMITY SENSING SYSTEM
    13.
    发明申请
    PROXIMITY SENSING SYSTEM 有权
    临近感应系统

    公开(公告)号：US20130176639A1

    公开(公告)日：2013-07-11

    申请号：US13712363

    申请日：2012-12-12

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Arup Polley ,  Rajarshi Mukhopadhyay ,  Reza Sharifi ,  Mark A. Wolfe

    IPC: G11B21/21

    CPC classification number: G11B21/21 ,  G11B5/6029 ,  G11B5/6076

    Abstract: A data storage system for detecting a location of a head relative to a magnetic media is described. This system comprises arms, a preamplifier circuit coupled to the arms for controlling the arms, a proximity sensing system positioned within the preamplifier circuit, the proximity sensing system comprising: an input stage for transmitting an input sense signal; a programmable gain stage coupled to receive the input sense signal and operative for transmitting a gain signal in response to receiving the input sense signal; a multiplexer coupled to receive the gain signal and at least one control signal, the multiplexer operative for transmitting a multiplexed signal; a detector coupled to receive the multiplexed signal and a second control signal, the detector operative for transmitting an output signal; wherein an amplitude associated with the output signal enables detecting the location of the head.

    Abstract translation: 描述了一种用于检测头相对于磁性介质的位置的数据存储系统。 该系统包括臂，耦合到用于控制臂的臂的前置放大器电路，位于前置放大器电路内的接近感测系统，所述接近感测系统包括：用于传输输入感测信号的输入级; 可编程增益级，其被耦合以接收所述输入检测信号并且用于响应于接收所述输入检测信号而发送增益信号; 多路复用器，其耦合以接收增益信号和至少一个控制信号，多路复用器用于发送多路复用信号; 耦合以接收所述多路复用信号的检测器和第二控制信号，所述检测器用于发送输出信号; 其中与输出信号相关联的振幅使得能够检测头部的位置。

    AVERAGE INDUCTOR CURRENT SENSING AND REGULATION
    14.
    发明申请
    AVERAGE INDUCTOR CURRENT SENSING AND REGULATION 有权

    公开(公告)号：US20250132681A1

    公开(公告)日：2025-04-24

    申请号：US18632695

    申请日：2024-04-11

    Applicant: Texas Instruments Incorporated

    Inventor： Reza Sharifi

    IPC: H02M3/158 ,  H02M1/00 ,  H02M3/07

    Abstract: Current regulation circuits and techniques. In one example, a circuit includes a voltage regulator circuit, current sensing circuitry, and a current control loop. The voltage regulator circuit is coupled to an output terminal of a DC-DC power converter and configured to produce a regulation signal based on a voltage at a regulator input terminal. The current sensing circuitry is coupled to a switching terminal of the DC-DC power converter and configured to produce a pulse signal based on a voltage at the switching input terminal and a threshold set by the regulation signal. The current control loop is coupled to control terminals of switching transistors of the DC-DC power converter and configured to generate switching control signals, based on the pulse signal, to control the switching transistors to drive an average value of a current flowing through the switching terminal to a target average current value corresponding to the threshold.

    MULTI-LEVEL GATE DRIVER
    16.
    发明申请
    MULTI-LEVEL GATE DRIVER 有权

    公开(公告)号：US20230068627A1

    公开(公告)日：2023-03-02

    申请号：US17894003

    申请日：2022-08-23

    Applicant: Texas Instruments Incorporated

    Inventor： Reza Sharifi ,  Ramesh Balan

    IPC: H02M3/158 ,  H03K19/20 ,  H03K17/687 ,  H03K3/037

    Abstract: In one example, a switched circuit includes first and second transistors. The first transistor has a first gate and a first source/drain path. The second transistor has a second gate and a second source/drain path. The first and second source/drain paths are coupled in series between an input terminal and an output terminal. A first drive circuit has a first drive input and a first drive output. A second drive circuit has a second drive input and a second drive output. The first drive output is coupled to the first gate, and the second drive output is coupled to the second gate. Switching circuitry is coupled between: at least one of first or second power supply circuits; and at least one of the first or second drive circuits.

    DC-DC Converter with Out-of-Audio Circuit
    17.
    发明申请
    DC-DC Converter with Out-of-Audio Circuit 有权

    公开(公告)号：US20220209669A1

    公开(公告)日：2022-06-30

    申请号：US17137086

    申请日：2020-12-29

    Applicant: Texas Instruments Incorporated

    Inventor： Reza Sharifi ,  Timothy Patrick Pauletti ,  Keliu Shu ,  Mark Baxter Weaver

    IPC: H02M3/156 ,  H02M3/157

    Abstract: A DC-DC regulator system includes a power circuit which has a first input coupled to receive an input voltage, a second input coupled to receive a control signal and an output to provide a regulated output voltage. The system includes a control circuit which has a first input coupled to receive the regulated output voltage, a second input coupled to receive a reference voltage, a first output to provide the control signal, and a second output to provide a converter clock signal. The system includes an out-of-audio circuit which has a first input coupled to receive a minimum threshold frequency signal, a second input coupled to receive the converter clock signal, a third input coupled to the power circuit output, and a fourth input coupled to receive a bandwidth control clock signal.

    Multiphase converter design with multi-path phase management
    18.
    发明授权
    Multiphase converter design with multi-path phase management 有权

    公开(公告)号：US11152861B2

    公开(公告)日：2021-10-19

    申请号：US16880452

    申请日：2020-05-21

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Wenliang Chen ,  Reza Sharifi ,  Byron Mitchell Reed ,  Jairo Daniel Olivares ,  Ryan Erik Lind

    IPC: H02M3/158 ,  H02M1/00 ,  H02M3/156 ,  H02M7/483

    Abstract: This disclosure relates to a multiphase converter design with multi-path phase management circuit and output logic. The phase management circuit and output logic can be employed to implement phase adding and shedding operations based on input and output current information and based on control signals for a power stage of the converter. In some examples, the design employs an estimate of an average output current based on a current at an input of the converter for phase control. In additional examples, the design employs cycle-by-cycle current limit and maximum duty-cycle signals to enable phase quickly during load transient. In further examples, the design employs low input and output-current sensed signals for efficient phase shedding and power saving. The design herein improves an overall accuracy of phase adding and shedding, load transient response performance, an operational efficiency and thermal performance of multiphase converter.

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