公开(公告)号：US20190077656A1

公开(公告)日：2019-03-14

申请号：US15698706

申请日：2017-09-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen COOK ,  Kurt WACHTLER ,  Adam Joseph FRUEHLING ,  Juan Alejandro HERBSOMMER ,  Simon Joshua JACOBS

IPC: B81C1/00 ,  G04F5/14

CPC classification number: B81C1/00793 ,  B81B3/0089 ,  B81B7/0038 ,  B81B2201/058 ,  B81B2203/0315 ,  G04F5/14 ,  H01L21/00

Abstract: Methods for depositing a measured amount of a species in a sealed cavity. In one example, a method for depositing molecules in a sealed cavity includes depositing a selected number of microcapsules in a cavity. Each of the microcapsules contains a predetermined amount of a first fluid. The cavity is sealed after the microcapsules are deposited. After the cavity is sealed the microcapsules are ruptured to release molecules of the first fluid into the cavity.

公开(公告)号：US20190071306A1

公开(公告)日：2019-03-07

申请号：US15697525

申请日：2017-09-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Juan Alejandro HERBSOMMER ,  Simon Joshua JACOBS ,  Benjamin Stassen COOK ,  Adam Joseph FRUEHLING

IPC: B81C1/00 ,  H01L23/08 ,  H01L21/768

CPC classification number: B81C1/00047 ,  B81B2203/0315 ,  B81C1/00539 ,  G04F5/14 ,  H01L21/76898 ,  H01L23/08

Abstract: An illustrate method (and device) includes etching a cavity in a first substrate (e.g., a semiconductor wafer), forming a first metal layer on a first surface of the first substrate and in the cavity, and forming a second metal layer on a non-conductive structure (e.g., glass). The method also may include removing a portion of the second metal layer to form an iris to expose a portion of the non-conductive structure, forming a bond between the first metal layer and the second metal layer to thereby attach the non-conductive structure to the first substrate, sealing an interface between the non-conductive structure and the first substrate, and patterning an antenna on a surface of the non-conductive structure.

公开(公告)号：US20190071304A1

公开(公告)日：2019-03-07

申请号：US15696245

申请日：2017-09-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Adam Joseph FRUEHLING ,  Juan Alejandro HERBSOMMER ,  Simon Joshua JACOBS ,  Benjamin Stassen COOK ,  James F. HALLAS ,  Randy LONG

IPC: B81B7/00 ,  H03L7/26 ,  G01L7/08 ,  G04F5/14

Abstract: An electronic device includes a package substrate, a circuit assembly, and a housing. The circuit assembly is mounted on the package substrate. The circuit assembly includes a first sealed cavity formed in a device substrate. The housing is mounted on the package substrate to form a second sealed cavity about the circuit assembly.

公开(公告)号：US20240376606A1

公开(公告)日：2024-11-14

申请号：US18779815

申请日：2024-07-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Simon Joshua JACOBS

IPC: C23F1/34 ,  H01L21/02

Abstract: An etching composition includes phosphate ions, pyrophosphate ions, polyphosphate ions. or a combination thereof and an oxidant. The etching composition has a neutral or basic pH.

公开(公告)号：US20240218250A1

公开(公告)日：2024-07-04

申请号：US18604167

申请日：2024-03-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Simon Joshua JACOBS

IPC: C09K13/02 ,  C09K13/00 ,  H01L21/306 ,  H01L21/308

CPC classification number: C09K13/02 ,  C09K13/00 ,  H01L21/30604 ,  H01L21/308

Abstract: An alkaline etching solution comprising a hydroxide salt (e.g., an alkali metal hydroxide, an ammonium hydroxide, or a combination thereof), a polyol having at least three hydroxyl (—OH) groups, and water. Also provided is a method of producing a semiconductor device by obtaining a semiconductor substrate having masked and unmasked surfaces; exposing the semiconductor substrate having the masked and unmasked surfaces to an alkaline etching solution, such that the unmasked surfaces of the substrate are anisotropically etched, wherein the alkaline etching solution comprises: a hydroxide salt; a polyol having at least three hydroxyl (—OH) groups; and water; and performing additional processing to produce the semiconductor device.

公开(公告)号：US20220359268A1

公开(公告)日：2022-11-10

申请号：US17683201

申请日：2022-02-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Scott Robert SUMMERFELT ,  Benjamin Stassen COOK ,  Simon Joshua JACOBS ,  Baher S. HAROUN

IPC: H01L21/762

Abstract: Disclosed herein is an integrated circuit (IC) comprising a semiconductor wafer, a dielectric layer, and an isolation element. The semiconductor wafer has a first wafer portion and a second wafer portion each extending from a frontside surface to a backside surface. The dielectric layer interfaces with the first wafer portion and with the second wafer portion each on the frontside surface. The isolation element has an isolation dielectric material, and the isolation element extends between a first side surface of the first wafer portion and a second side surface of the second wafer portion and from an extension plane of the frontside surface to an extension plane of the backside surface. Also disclosed herein is a system comprising the IC and a package substrate coupled to the IC.

公开(公告)号：US20200207610A1

公开(公告)日：2020-07-02

申请号：US16728309

申请日：2019-12-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Simon Joshua JACOBS

IPC: B81B7/00 ,  B81C1/00

Abstract: A microelectronic device package includes a host material and a gettering material. The microelectronic device package also includes a polymeric component between the host material and the gettering material. The polymeric component substantially encapsulates the gettering material. The microelectronic device package further includes a fluorochemical lubricant. The polymeric component serves to prevent a reaction between the fluorochemical lubricant and the gettering material. Alternatively, the fluorochemical lubricant may be encapsulated by a polymeric component and may be released upon an increase in temperature during or after a packaging step.

公开(公告)号：US20180186625A1

公开(公告)日：2018-07-05

申请号：US15395029

申请日：2016-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Simon Joshua JACOBS ,  Molly Nelis SING ,  Kelly Jay TAYLOR

IPC: B81B3/00 ,  B81C1/00

CPC classification number: B81B3/0075 ,  B81B2207/07 ,  B81C1/0038 ,  B81C2201/0132 ,  B81C2201/0176

Abstract: In described examples, a method of forming a microelectromechanical device comprises: forming a first metallic layer comprising a conducting layer on a substrate; forming a first dielectric layer on the first metallic layer, wherein the first dielectric layer comprises one or more individual dielectric layers; forming a sacrificial layer on the first dielectric layer; forming a second dielectric layer on the sacrificial layer; forming a second metallic layer on the second dielectric layer; and removing the sacrificial layer to form a spacing between the second dielectric layer and the first dielectric layer. Removing the sacrificial layer enables movement of the second dielectric layer relative to the first dielectric layer in at least one direction.

公开(公告)号：US20140167295A1

公开(公告)日：2014-06-19

申请号：US13784423

申请日：2013-03-04

Applicant: Texas Instruments Incorporated

Inventor： William Robert MORRISON ,  Mark Christopher FISHER ,  Murali Hanabe ,  Ganapathy Subramaniam SIVAKUMAR ,  Simon Joshua JACOBS

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81C1/00984 ,  B81B3/0005 ,  B81B7/0032 ,  B81C1/00261 ,  B81C1/0096 ,  B81C2201/112 ,  H01L21/02112 ,  H04W4/02 ,  Y10S257/914

Abstract: A device comprises a MEMS component comprising at least one surface and a coating disposed on at least a portion of the surface. The coating comprises a compound of the formula M(CnF2n+1Or), wherein M comprises a polar head group, and wherein n≧2r. The value of n may range from 2 to about 20, and the value of r may range from 1 to about 10. The value of n plus r may range from 3 to about 30, and a ratio of n:r may have a value of about 2:1 to about 20:1.

Abstract translation: 一种装置包括MEMS组件，其包括设置在该表面的至少一部分上的至少一个表面和涂层。 涂层包含式M（C n F 2n + 10r）的化合物，其中M包括极性头基，其中n≥2r。 n的值可以在2至约20的范围内，并且r的值可以在1至约10的范围内.n加r的值可以在3至约30的范围内，并且n：r的比可以具有值 为约2：1至约20：1。