公开(公告)号：US11742265B2

公开(公告)日：2023-08-29

申请号：US16660713

申请日：2019-10-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hung-Yu Chou ,  Chi-Chen Chien ,  Yuh-Harng Chien ,  Steven Alfred Kummerl ,  Bo-Hsun Pan ,  Fu-Hua Yu

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L23/522 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/49568 ,  H01L21/4839 ,  H01L21/565 ,  H01L23/3157 ,  H01L23/49548 ,  H01L23/49861 ,  H01L23/5228

Abstract: In some examples, a semiconductor package comprises a lead frame. The lead frame includes a first row of leads; a first pad coupled to the first row of leads; a second row of leads; and a second pad coupled to the second row of leads, the first and second pads separated by a gap. The semiconductor package includes a heat-generating device coupled to the first and second pads and exposed to an exterior of the semiconductor package.

公开(公告)号：US11551986B2

公开(公告)日：2023-01-10

申请号：US17220782

申请日：2021-04-01

Applicant: Texas Instruments Incorporated

Inventor： Steven Alfred Kummerl ,  Benjamin Stassen Cook

IPC: H01L23/14 ,  H01L21/48 ,  H01L23/498 ,  H01L21/78

Abstract: A method for forming a semiconductor structure includes curing a shape memory polymer in a first shape. The shape memory polymer is coupled to a conductive layer. The method further includes folding the shape memory polymer from the first shape into a second shape. The method also includes bonding a semiconductor wafer to the conductive layer while the shape memory polymer is in the second shape. The semiconductor wafer has first and second dies. The semiconductor wafer is then singulated to separate the first die from the second die. The method further includes expanding the shape memory polymer to its first shape and singulating the shape memory polymer to separate the first and second dies.

公开(公告)号：US20220384353A1

公开(公告)日：2022-12-01

申请号：US17500086

申请日：2021-10-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yiqi Tang ,  Rajen Manicon Murugan ,  Liang Wan ,  Makarand Ramkrishna Kulkarni ,  Jie Chen ,  Steven Alfred Kummerl

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/48

Abstract: A semiconductor package includes a first layer including a semiconductor die and a shunt embedded within a first dielectric substrate layer, and metal pillars extending therethrough. The semiconductor package further includes a second layer stacked on the first layer, the second layer including a metal trace patterned on the first dielectric substrate layer, and a second dielectric substrate layer over the metal trace. The metal trace electrically connects a first portion of the shunt to a first metal pillar of the metal pillars and electrically connects a second portion of the shunt to a second metal pillar of the metal pillars. The semiconductor package further includes a base layer opposite the second layer relative the first layer, the base layer forming exposed electrical contact pads for the semiconductor package, the electrical contact pads providing electrical connections to the shunt, the metal pillars, and the semiconductor die.

公开(公告)号：US11081428B2

公开(公告)日：2021-08-03

申请号：US16537535

申请日：2019-08-10

Applicant: Texas Instruments Incorporated

Inventor： Stanley Chou ,  Yuh-Harng Chien ,  Steven Alfred Kummerl ,  Bo-Hsun Pan ,  Pi-Chiang Huang ,  Frank Yu ,  Chih-Chien Ho

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/492

Abstract: An electronic device includes a package structure with opposite first and second sides spaced apart along a first direction, opposite third and fourth sides spaced apart along a second direction, opposite fifth and sixth sides spaced apart along a third direction, the first, second, and third directions being orthogonal to one another. A set of first leads extend outward from the first side along the first direction, a set of second leads extend outward from the second side along the first direction, and a thermal pad includes a first portion that extends along a portion of the fifth side, and a second portion that extends along a portion of the third side to facilitate cooling and visual solder inspection when soldered to a host printed circuit board.

公开(公告)号：US09679864B2

公开(公告)日：2017-06-13

申请号：US15293075

申请日：2016-10-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Juan Alejandro Herbsommer ,  Matthew David Romig ,  Steven Alfred Kummerl ,  Wei-Yan Shih

IPC: H01L21/44 ,  H01L23/00 ,  H01L21/768 ,  H01L23/528 ,  H01L21/48 ,  H01L23/552 ,  H01L23/538 ,  H01L23/66

CPC classification number: H01L24/27 ,  H01L21/4867 ,  H01L21/76838 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/66 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L2223/6627 ,  H01L2224/24998 ,  H01L2224/2732 ,  H01L2224/27848 ,  H01L2224/29026 ,  H01L2224/29076 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method forming a packaged semiconductor device includes providing a first semiconductor die (first die) having bond pads thereon mounted face-up on a package substrate or on a die pad of a lead frame (substrate), wherein the substrate includes terminals or contact pads (substrate pads). A first dielectric layer is formed including printing a first dielectric precursor layer including a first ink having a first liquid carrier solvent extending from the substrate pads to the bond pads. A first interconnect precursor layer is printed including a second ink having a second liquid carrier over the first dielectric layer extending from the substrate pads to the bond pads. Sintering or curing the first interconnect precursor layer removes at least the second liquid carrier to form an electrically conductive interconnect including an ink residue which connects respective substrate pads to respective bond pads.

公开(公告)号：US20170033072A1

公开(公告)日：2017-02-02

申请号：US15293075

申请日：2016-10-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Juan Alejandro Herbsommer ,  Matthew David Romig ,  Steven Alfred Kummerl ,  Wei-Yan Shih

IPC: H01L23/00 ,  H01L23/66

CPC classification number: H01L24/27 ,  H01L21/4867 ,  H01L21/76838 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/552 ,  H01L23/66 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/82 ,  H01L2223/6627 ,  H01L2224/24998 ,  H01L2224/2732 ,  H01L2224/27848 ,  H01L2224/29026 ,  H01L2224/29076 ,  H01L2224/32227 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method forming a packaged semiconductor device includes providing a first semiconductor die (first die) having bond pads thereon mounted face-up on a package substrate or on a die pad of a lead frame (substrate), wherein the substrate includes terminals or contact pads (substrate pads). A first dielectric layer is formed including printing a first dielectric precursor layer including a first ink having a first liquid carrier solvent extending from the substrate pads to the bond pads. A first interconnect precursor layer is printed including a second ink having a second liquid carrier over the first dielectric layer extending from the substrate pads to the bond pads. Sintering or curing the first interconnect precursor layer removes at least the second liquid carrier to form an electrically conductive interconnect including an ink residue which connects respective substrate pads to respective bond pads.

Abstract translation: 一种形成封装半导体器件的方法包括提供一种第一半导体管芯（第一管芯），其上具有接合焊盘，其面朝上安装在封装衬底上或引线框架（衬底）的管芯焊盘上，其中衬底包括端子或接触焊盘 （基板焊盘）。 形成第一电介质层，包括印刷第一电介质前体层，该第一电介质前体层包括具有从衬底焊盘延伸到接合焊盘的第一液体载体溶剂的第一油墨。 印刷第一互连前体层，其包括在从衬底焊盘延伸到接合焊盘的第一介电层上方具有第二液体载体的第二油墨。 烧结或固化第一互连前体层至少去除第二液体载体以形成包括将各个衬底焊盘连接到各个焊盘的墨残余物的导电互连。

公开(公告)号：US12040197B2

公开(公告)日：2024-07-16

申请号：US17401057

申请日：2021-08-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yuh-Harng Chien ,  Hung-Yu Chou ,  Fu-Kang Lee ,  Steven Alfred Kummerl

IPC: H01L23/62 ,  H01L21/48 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L21/4825 ,  H01L21/4842 ,  H01L23/49517 ,  H01L23/49548 ,  H01L23/62 ,  H01L24/00 ,  H01L23/49551 ,  H01L23/49562

Abstract: An integrated circuit package having a shunt resistor with at least one self-aligning member that protrudes from a first surface, and a lead frame with at least one self-aligning feature that is a cavity within which the at least one self-aligning member is located, and an integrated circuit located on the lead frame.

公开(公告)号：US11972994B2

公开(公告)日：2024-04-30

申请号：US18299293

申请日：2023-04-12

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sreenivasan Kalyani Koduri ,  Leslie Edward Stark ,  Steven Alfred Kummerl ,  Wai Lee

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/14 ,  H01L23/29 ,  H01L25/065

CPC classification number: H01L23/31 ,  H01L21/565 ,  H01L23/142 ,  H01L23/293 ,  H01L23/564 ,  H01L25/0655

Abstract: In some examples, a sensor package includes a semiconductor die having a sensor; a mold compound covering a portion of the semiconductor die; and a cavity formed in a top surface of the mold compound, the sensor being in the cavity. The sensor package includes an adhesive abutting the top surface of the mold compound, and a semi-permeable film abutting the adhesive and covering the cavity. The semi-permeable film is approximately flush with at least four edges of the top surface of the mold compound.

公开(公告)号：US11735506B2

公开(公告)日：2023-08-22

申请号：US16206640

申请日：2018-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hung-Yu Chou ,  Bo-Hsun Pan ,  Yuh-Harng Chien ,  Fu-Hua Yu ,  Steven Alfred Kummerl ,  Jie Chen ,  Rajen M. Murugan

IPC: H01L23/495 ,  H01L23/31 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/49568 ,  H01L21/4821 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49503

Abstract: In an example, an apparatus comprises a lead frame that includes a first row of leads, a first pad coupled to the first row of leads, and a second row of leads parallel to the first row of leads. The lead frame also includes a second pad coupled to the second row of leads. The first and second pads are separated by a gap, and each of the first and second pads has a substantially uniform thickness. The apparatus also includes a device coupled to the first and second pads. The first and second pads are exposed to an exterior of the apparatus.

公开(公告)号：US11658083B2

公开(公告)日：2023-05-23

申请号：US17116963

申请日：2020-12-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sreenivasan Kalyani Koduri ,  Leslie Edward Stark ,  Steven Alfred Kummerl ,  Wai Lee

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/14 ,  H01L23/00 ,  H01L23/29 ,  H01L21/56

CPC classification number: H01L23/31 ,  H01L21/565 ,  H01L23/142 ,  H01L23/293 ,  H01L23/564 ,  H01L25/0655

Abstract: In some examples, a sensor package includes a semiconductor die having a sensor; a mold compound covering a portion of the semiconductor die; and a cavity formed in a top surface of the mold compound, the sensor being in the cavity. The sensor package includes an adhesive abutting the top surface of the mold compound, and a semi-permeable film abutting the adhesive and covering the cavity. The semi-permeable film is approximately flush with at least four edges of the top surface of the mold compound.