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    SEMICONDUCTOR DEVICE AND METHOD
    13.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD 有权

    公开(公告)号：US20250089340A1

    公开(公告)日：2025-03-13

    申请号：US18408932

    申请日：2024-01-10

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Jet-Rung Chang ,  Ming-Hua Yu ,  Yi-Fang Pai

    IPC: H01L29/45 ,  H01L21/285 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775

    Abstract: A semiconductor device and the method of forming the same are provided. The semiconductor device may comprise a first plurality of nanostructures, a second plurality of nanostructures over a substrate, a first gate stack extending between the nanostructures of the first plurality of nanostructures, a second gate stack extending between the nanostructures of the second plurality of nanostructures, a first source/drain region in contact with a first nanostructure of the first plurality of nanostructures, a second source/drain region in contact with a first nanostructure of the second plurality of nanostructures, wherein the second source/drain region may be separated from the first source/drain region, a silicide layer between the first source/drain region and the second source/drain region, and an isolation layer between the silicide layer and the substrate.

    SEMICONDUCTOR DEVICE AND METHOD
    15.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD 有权

    公开(公告)号：US20240395867A1

    公开(公告)日：2024-11-28

    申请号：US18791167

    申请日：2024-07-31

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Che-Yu Lin ,  Ming-Hua Yu ,  Yee-Chia Yeo

    IPC: H01L29/08 ,  H01L21/02 ,  H01L29/04 ,  H01L29/66 ,  H01L29/78

    Abstract: A method includes forming a fin protruding from a substrate; forming an isolation region surrounding the fin; forming a gate structure extending over the fin and the isolation region; etching the fin adjacent the gate structure to form a recess; forming a source/drain region in the recess, including performing a first epitaxial process to grow a first semiconductor material in the recess, wherein the first epitaxial process preferentially forms facet planes of a first crystalline orientation; and performing a second epitaxial process to grow a second semiconductor material on the first semiconductor material, wherein the second epitaxial process preferentially forms facet planes of a second crystalline orientation, wherein a top surface of the second semiconductor material is above a top surface of the fin; and forming a source/drain contact on the source/drain region.

    SOURCE/DRAIN FORMATION WITH REDUCED SELECTIVE LOSS DEFECTS
    16.
    发明申请
    SOURCE/DRAIN FORMATION WITH REDUCED SELECTIVE LOSS DEFECTS 有权

    公开(公告)号：US20240387702A1

    公开(公告)日：2024-11-21

    申请号：US18789176

    申请日：2024-07-30

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chih-Chiang Chang ,  Ming-Hua Yu ,  Li-Li Su

    IPC: H01L29/66 ,  H01L21/20 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/417 ,  H01L29/78

    Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.

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