公开(公告)号：US20210074581A1

公开(公告)日：2021-03-11

申请号：US17099263

申请日：2020-11-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Cheng Chou ,  Chih-Chien Chi ,  Chung-Chi Ko ,  Yao-Jen Chang ,  Chen-Yuan Kao ,  Kai-Shiang Kuo ,  Po-Cheng Shih ,  Tze-Liang Lee ,  Jun-Yi Ruan

IPC: H01L21/768 ,  H01L23/532 ,  H01L21/8234 ,  H01L21/84 ,  H01L29/66 ,  H01L23/522 ,  H01L23/528 ,  H01L29/78

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for surrounding dielectric layers. The insert layer may be applied between two dielectric layers. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

公开(公告)号：US09236294B2

公开(公告)日：2016-01-12

申请号：US14153831

申请日：2014-01-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Chia-Cheng Chou ,  Chung-Chi Ko ,  Po-Cheng Shih ,  Chih-Hung Sun ,  Kuang-Yuan Hsu ,  Joung-Wei Liou ,  Tze-Liang Lee

IPC: H01L21/00 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L21/76868 ,  H01L21/02351 ,  H01L21/02354 ,  H01L21/3105 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76825 ,  H01L21/76826

Abstract: Embodiments of the disclosure provide a method for forming a semiconductor device structure. The method includes forming a dielectric layer over a semiconductor substrate. The method also includes applying a carbon-containing material over the dielectric layer. The method further includes irradiating the dielectric layer and the carbon-containing material with a light to repair the dielectric layer, and the light has a wavelength greater than about 450 nm.

Abstract translation: 本公开的实施例提供了一种用于形成半导体器件结构的方法。 该方法包括在半导体衬底上形成电介质层。 该方法还包括在电介质层上涂覆含碳材料。 该方法还包括用光照射介电层和含碳材料以修复电介质层，并且光具有大于约450nm的波长。

公开(公告)号：US09093265B2

公开(公告)日：2015-07-28

申请号：US14053727

申请日：2013-10-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Cheng Shih ,  Hui-Chun Yang ,  Chung-Chi Ko ,  Kuang-Yuan Hsu

IPC: H01L21/02

CPC classification number: H01L21/02263 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02345 ,  H01L21/02348 ,  H01L21/67115 ,  H01L21/68771

Abstract: One embodiment is a method for semiconductor processing. In this method, a precursor film is provided over a semiconductor substrate, where the precursor film is made of a structural former and porogen. Prior to cross-linking, the porogen is removed by exposure to UV radiation having one or more wavelengths in the range of 150 nm to 300 nm, while a temperature of 300° C. to 500° C. is applied to the semiconductor substrate. Meanwhile, a Argon:Helium flow rate of 80>Ar>10 slm, 80>He>10 slm is set for the ambient substrate environment where the ratio of Ar:He ranges from 0:1 to 1:0 by volume or molality.

Abstract translation: 一个实施例是用于半导体处理的方法。 在该方法中，前体膜设置在半导体衬底上，其中前体膜由结构形成剂和致孔剂制成。 在交联之前，通过暴露于具有150nm至300nm范围内的一个或多个波长的紫外线辐射来除去致孔剂，同时将温度为300℃至500℃的温度施加到半导体衬底。 同时，Ar：He的比例为0：1至1：0，其体积或摩尔比为Ar>氦流量80> Ar> 10 slm，80> He> 10 slm。

公开(公告)号：US20150104953A1

公开(公告)日：2015-04-16

申请号：US14053727

申请日：2013-10-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Cheng Shih ,  Hui-Chun Yang ,  Chung-Chi Ko ,  Kuang-Yuan Hsu

IPC: H01L21/02

CPC classification number: H01L21/02263 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02345 ,  H01L21/02348 ,  H01L21/67115 ,  H01L21/68771

Abstract: One embodiment is a method for semiconductor processing. In this method, a precursor film is provided over a semiconductor substrate, where the precursor film is made of a structural former and porogen. Prior to cross-linking, the porogen is removed by exposure to UV radiation having one or more wavelengths in the range of 150 nm to 300 nm, while a temperature of 300° C. to 500° C. is applied to the semiconductor substrate. Meanwhile, a Argon:Helium flow rate of 80>Ar>10 slm, 80>He>10 slm is set for the ambient substrate environment where the ratio of Ar:He ranges from 0:1 to 1:0 by volume or molality.

Abstract translation: 一个实施例是用于半导体处理的方法。 在该方法中，前体膜设置在半导体衬底上，其中前体膜由结构形成剂和致孔剂制成。 在交联之前，通过暴露于具有150nm至300nm范围内的一个或多个波长的紫外线辐射来除去致孔剂，同时将温度为300℃至500℃的温度施加到半导体衬底。 同时，Ar：He的比例为0：1至1：0，其体积或摩尔比为Ar>氦流量80> Ar> 10 slm，80> He> 10 slm。

公开(公告)号：US20240332068A1

公开(公告)日：2024-10-03

申请号：US18738256

申请日：2024-06-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Jen Lo ,  Po-Cheng Shih ,  Syun-Ming Jang ,  Tze-Liang Lee

IPC: H01L21/768 ,  G03F7/038 ,  G03F7/039 ,  G03F7/20 ,  H01L21/027

CPC classification number: H01L21/76823 ,  G03F7/038 ,  G03F7/039 ,  G03F7/2004 ,  G03F7/2022 ,  H01L21/0274 ,  H01L21/76802 ,  H01L21/76877

Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.

公开(公告)号：US12033890B2

公开(公告)日：2024-07-09

申请号：US18309131

申请日：2023-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Jen Lo ,  Po-Cheng Shih ,  Syun-Ming Jang ,  Tze-Liang Lee

IPC: H01L21/768 ,  G03F7/038 ,  G03F7/039 ,  G03F7/20 ,  H01L21/027

CPC classification number: H01L21/76823 ,  G03F7/038 ,  G03F7/039 ,  G03F7/2004 ,  G03F7/2022 ,  H01L21/0274 ,  H01L21/76802 ,  H01L21/76877

Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.

公开(公告)号：US20230154992A1

公开(公告)日：2023-05-18

申请号：US17651671

申请日：2022-02-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tze-Liang Lee ,  Po-Hsien Cheng ,  Po-Cheng Shih

IPC: H01L29/417 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L29/41775 ,  H01L29/66795 ,  H01L29/6656 ,  H01L21/823431 ,  H01L29/41791

Abstract: A structure includes a gate stack over a semiconductor region, a source/drain region on a side of the gate stack, a contact etch stop layer over a part of the source/drain region, an inter-layer dielectric over the contact etch stop layer, a silicide region over the source/drain region, a source/drain contact plug over and contacting the silicide region, and an isolation layer encircling the source/drain contact plug. In a top view of the source/drain contact plug, the source/drain contact plug is elongated, and the isolation layer includes an end portion at an end of the source/drain contact plug, and a middle portion between opposing ends of the source/drain contact plug. An end-portion thickness of the end portion is greater than a middle-portion thickness of the middle portion.

公开(公告)号：US20220367355A1

公开(公告)日：2022-11-17

申请号：US17815381

申请日：2022-07-27

Applicant: Taiwan Semiconductor Manufacturing Co, Ltd.

Inventor： Chao-Chun Wang ,  Chung-Chi Ko ,  Po-Cheng Shih

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/532 ,  H01L23/522

Abstract: An integrated circuit structure includes a first low-k dielectric layer having a first k value, and a second low-k dielectric layer having a second k value lower than the first k value. The second low-k dielectric layer is overlying the first low-k dielectric layer. A dual damascene structure includes a via with a portion in the first low-k dielectric layer, and a metal line over and joined to the via. The metal line includes a portion in the second low-k dielectric layer.

公开(公告)号：US11282742B2

公开(公告)日：2022-03-22

申请号：US16655961

申请日：2019-10-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Cheng Shih ,  Tze-Liang Lee ,  Jen-Hung Wang ,  Yu-Kai Lin ,  Su-Jen Sung

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522 ,  H01L21/02

Abstract: A semiconductor device structure is provided. The structure includes a conductive feature formed in an insulating layer. The structure also includes a first metal-containing dielectric layer formed over the insulating layer and covering the top surface of the conductive feature. The structure further includes a silicon-containing dielectric layer formed over the first metal-containing dielectric layer. In addition, the structure includes a second metal-containing dielectric layer formed over the silicon-containing dielectric layer. The second metal-containing dielectric layer includes a material that is different than the material of the first metal-containing dielectric layer.

公开(公告)号：US20210265204A1

公开(公告)日：2021-08-26

申请号：US17094700

申请日：2020-11-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Jen Lo ,  Po-Cheng Shih ,  Syun-Ming Jang ,  Tze-Liang Lee

IPC: H01L21/768 ,  H01L21/027 ,  G03F7/038 ,  G03F7/039 ,  G03F7/20

Abstract: A representative method includes forming a photo-sensitive material over a substrate, and forming a cap layer over the photo-sensitive material, and patterning the cap layer. Using the patterned cap layer, a first portion of the photo-sensitive material is selectively exposed to a pre-selected light wavelength to change at least one material property of the first portion of the photo-sensitive material, while preventing a second portion of the photo-sensitive material from being exposed to the pre-selected light wavelength. One, but not both of the following steps is then conducted: removing the first portion of the photo-sensitive material and forming in its place a conductive element at least partially surrounded by the second portion of the photo-sensitive material, or removing the second portion of the photo-sensitive material and forming from the first portion of the photo-sensitive material a conductive element electrically connecting two or more portions of a circuit.