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公开(公告)号:US20170338188A1
公开(公告)日:2017-11-23
申请号:US15477717
申请日:2017-04-03
发明人: Hsien-Wei CHEN , Hao-Yi TSAI , Mirng-Ji LII , Chen-Hua YU
IPC分类号: H01L23/00 , H01L23/522 , H01L23/31 , H01L23/525
CPC分类号: H01L23/562 , H01L23/3114 , H01L23/3192 , H01L23/522 , H01L23/525 , H01L24/05 , H01L24/13 , H01L2224/02235 , H01L2224/02255 , H01L2224/02375 , H01L2224/02377 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05027 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05186 , H01L2224/05552 , H01L2224/05572 , H01L2224/05647 , H01L2224/05655 , H01L2224/13022 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2924/00014 , H01L2924/12042 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/01013 , H01L2924/01024 , H01L2924/01028 , H01L2924/0105 , H01L2924/01079 , H01L2924/01047 , H01L2924/00
摘要: A method of fabricating a semiconductor device includes forming a passivation layer overlying a semiconductor substrate, and an interconnect structure overlying the passivation layer. The interconnect structure includes a landing pad region and a dummy region electrically separated from each other. A protective layer overlies the interconnect structure and includes a first opening exposing a portion of the landing pad region and a second opening exposing a portion of the dummy region. A metal layer is formed on the exposed portion of landing pad region and the exposed portion of the dummy region. A bump is formed on the metal layer overlying the landing pad region.