Device, system and method for providing MEMS structures of a semiconductor package
    12.
    发明授权
    Device, system and method for providing MEMS structures of a semiconductor package 有权
    用于提供半导体封装的MEMS结构的装置,系统和方法

    公开(公告)号:US09505610B2

    公开(公告)日:2016-11-29

    申请号:US14129541

    申请日:2013-09-25

    Abstract: Techniques and mechanisms for providing precisely fabricated structures of a semiconductor package. In an embodiment, a build-up carrier of the semiconductor package includes a layer of porous dielectric material. Seed copper and plated copper is disposed on the layer of porous dielectric material. Subsequent etching is performed to remove copper adjacent to the layer of porous dielectric material, forming a gap separating a suspended portion of a MEMS structure from the layer of porous dielectric material. In another embodiment, the semiconductor package includes a copper structure disposed between portions of an insulating layer or portions of a layer of silicon nitride material. The layer of silicon nitride material couples the insulating layer to another insulating layer. One or both of the insulating layers are each protected from desmear processing with a respective release layer structure.

    Abstract translation: 用于提供半导体封装的精确制造结构的技术和机构。 在一个实施例中,半导体封装的积聚载体包括多孔介电材料层。 种子铜和电镀铜设置在多孔电介质材料层上。 进行随后的蚀刻以去除邻近多孔介电材料层的铜,形成将MEMS结构的悬置部分与多孔介电材料层分开的间隙。 在另一个实施例中,半导体封装包括设置在绝缘层的一部分之间或者氮化硅材料层的一部分的铜结构。 氮化硅材料层将绝缘层耦合到另一绝缘层。 每个绝缘层中的一个或两个保护层不受去离子处理的剥离层结构的剥离。

    THROUGH-SILICON VIA (TSV)-BASED DEVICES AND ASSOCIATED TECHNIQUES AND CONFIGURATIONS
    13.
    发明申请
    THROUGH-SILICON VIA (TSV)-BASED DEVICES AND ASSOCIATED TECHNIQUES AND CONFIGURATIONS 有权
    通过硅胶(TSV)设备和相关技术和配置

    公开(公告)号:US20150255372A1

    公开(公告)日:2015-09-10

    申请号:US14203415

    申请日:2014-03-10

    Abstract: Embodiments of the present disclosure are directed toward through-silicon via (TSV)-based devices and associated techniques and configurations. In one embodiment, an apparatus includes a die having active circuitry disposed on a first side of the die and a second side disposed opposite to the first side, a bulk semiconductor material disposed between the first side and the second side of the die and a device including one or more of a capacitor, resistor or resonator disposed in the bulk semiconductor material, the capacitor, resistor or resonator including one or more TSV structures that extend through the bulk semiconductor material, an electrically insulative material disposed in the one or more TSV structures and an electrode material or resistor material in contact with the electrically insulative material within the one or more TSV structures.

    Abstract translation: 本公开的实施例涉及基于硅通孔(TSV)的器件及相关技术和配置。 在一个实施例中,一种装置包括具有设置在管芯的第一侧上的有源电路和与第一侧相对设置的第二侧的管芯,设置在管芯的第一侧和第二侧之间的体半导体材料, 包括设置在体半导体材料中的电容器,电阻器或谐振器中的一个或多个,包括延伸穿过体半导体材料的一个或多个TSV结构的电容器,电阻器或谐振器,设置在一个或多个TSV结构中的电绝缘材料 以及与一个或多个TSV结构内的电绝缘材料接触的电极材料或电阻材料。

    Multiband antenna array using electromagnetic bandgap structures
    17.
    发明授权
    Multiband antenna array using electromagnetic bandgap structures 有权
    多频带天线阵列使用电磁带隙结构

    公开(公告)号:US07760140B2

    公开(公告)日:2010-07-20

    申请号:US11449915

    申请日:2006-06-09

    CPC classification number: H01Q1/2258 H01Q1/241 H01Q15/008

    Abstract: In some embodiments, a multiband antenna array using electromagnetic bandgap structures is presented. In this regard, an antenna array is introduced having two or more planar antennas situated substantially on a surface of a substrate, a first set of electromagnetic bandgap (EBG) cells situated substantially between and on plane with the antennas, and a second set of EBG cells situated within the substrate below the antennas. Other embodiments are also disclosed and claimed.

    Abstract translation: 在一些实施例中,提出了使用电磁带隙结构的多频带天线阵列。 在这方面,引入天线阵列,其具有基本上位于衬底的表面上的两个或更多个平面天线,基本上位于天线之间并且与天线平面上的第一组电磁带隙(EBG)单元,以及第二组EBG 位于天线下方的基板内的单元。 还公开并要求保护其他实施例。

    Silicon level solution for mitigation of substrate noise
    19.
    发明申请
    Silicon level solution for mitigation of substrate noise 审中-公开
    硅片解决方案,用于减轻衬底噪声

    公开(公告)号:US20080001262A1

    公开(公告)日:2008-01-03

    申请号:US11479583

    申请日:2006-06-29

    Abstract: The techniques described herein reduce the substrate noise current that exists when digital and analog components reside on the same microelectronic die. Single or multiple rows of isolation vias form isolation barriers between the individual circuit blocks. The isolation vias may be hollow or (lined or filled) with a conductive or non-conductive material.

    Abstract translation: 这里描述的技术减少了当数字和模拟组件驻留在相同的微电子管芯上时存在的衬底噪声电流。 单个或多排隔离通孔在各个电路块之间形成隔离屏障。 隔离通孔可以是中空的或(衬里的或填充的)导电或非导电材料。

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