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1.发明授权Device, system and method for providing MEMS structures of a semiconductor package 有权用于提供半导体封装的MEMS结构的装置，系统和方法公开(公告)号：US09505610B2
公开(公告)日：2016-11-29
申请号：US14129541
申请日：2013-09-25
申请人： Weng Hong Teh , Tarek A Ibrahim , Sarah K Haney , Daniel N Sobieski , Parshuram B Zantye , Chad E Mair , Telesphor Kamgaing
发明人： Weng Hong Teh , Tarek A Ibrahim , Sarah K Haney , Daniel N Sobieski , Parshuram B Zantye , Chad E Mair , Telesphor Kamgaing
CPC分类号： B81C1/00246 , B81B2201/0271 , B81C1/00261 , B81C1/00277 , H01L21/568 , H01L24/19 , H01L2224/04105 , H01L2224/73267 , H01L2924/01079
摘要： Techniques and mechanisms for providing precisely fabricated structures of a semiconductor package. In an embodiment, a build-up carrier of the semiconductor package includes a layer of porous dielectric material. Seed copper and plated copper is disposed on the layer of porous dielectric material. Subsequent etching is performed to remove copper adjacent to the layer of porous dielectric material, forming a gap separating a suspended portion of a MEMS structure from the layer of porous dielectric material. In another embodiment, the semiconductor package includes a copper structure disposed between portions of an insulating layer or portions of a layer of silicon nitride material. The layer of silicon nitride material couples the insulating layer to another insulating layer. One or both of the insulating layers are each protected from desmear processing with a respective release layer structure.
摘要翻译： 用于提供半导体封装的精确制造结构的技术和机构。 在一个实施例中，半导体封装的积聚载体包括多孔介电材料层。 种子铜和电镀铜设置在多孔电介质材料层上。 进行随后的蚀刻以去除邻近多孔介电材料层的铜，形成将MEMS结构的悬置部分与多孔介电材料层分开的间隙。 在另一个实施例中，半导体封装包括设置在绝缘层的一部分之间或者氮化硅材料层的一部分的铜结构。 氮化硅材料层将绝缘层耦合到另一绝缘层。 每个绝缘层中的一个或两个保护层不受去离子处理的剥离层结构的剥离。
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公开(公告)号：US09420693B2
公开(公告)日：2016-08-16
申请号：US14490615
申请日：2014-09-18
IPC分类号： H05K1/00 , H05K1/18 , H01L21/48 , H01L23/498 , H05K1/09 , H05K1/11 , H05K3/00 , H05K3/18 , H05K3/46
CPC分类号： H01G4/33 , H01L21/4857 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2924/15311 , H05K1/09 , H05K1/115 , H05K1/162 , H05K1/185 , H05K3/0017 , H05K3/188 , H05K3/4644 , H05K3/467 , H05K2201/10015
摘要： An embedded thin film capacitor and methods of its fabrication are disclosed. The embedded thin film capacitor includes two conductive plates separated by a dielectric layer. In embodiments, the capacitor is enclosed within a package substrate. A method of forming the embedded thin film capacitor includes forming a first insulating layer on a bottom plate and a first trace. A first opening is then formed in a first insulating layer to expose a first region of a bottom plate. An adhesive layer is then formed on the first insulating layer and on top of the exposed first region of the bottom plate. A second opening is formed through the insulating layer and the first insulating layer to expose a second region of the bottom plate. A top plate is formed within the first opening and a via is formed within the second opening.
摘要翻译： 公开了一种嵌入式薄膜电容器及其制造方法。 嵌入式薄膜电容器包括由电介质层分开的两个导电板。 在实施例中，电容器封装在封装衬底内。 形成嵌入式薄膜电容器的方法包括在底板和第一迹线上形成第一绝缘层。 然后在第一绝缘层中形成第一开口以暴露底板的第一区域。 然后在第一绝缘层上和在底板的暴露的第一区域的顶部上形成粘合剂层。 通过绝缘层和第一绝缘层形成第二开口以露出底板的第二区域。 顶板形成在第一开口内，并在第二开口内形成通孔。
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公开(公告)号：US20160088736A1
公开(公告)日：2016-03-24
申请号：US14490615
申请日：2014-09-18
CPC分类号： H01G4/33 , H01L21/4857 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2924/15311 , H05K1/09 , H05K1/115 , H05K1/162 , H05K1/185 , H05K3/0017 , H05K3/188 , H05K3/4644 , H05K3/467 , H05K2201/10015
摘要： An embedded thin film capacitor and methods of its fabrication are disclosed. The embedded thin film capacitor includes two conductive plates separated by a dielectric layer. In embodiments, the capacitor is enclosed within a package substrate. A method of forming the embedded thin film capacitor includes forming a first insulating layer on a bottom plate and a first trace. A first opening is then formed in a first insulating layer to expose a first region of a bottom plate. An adhesive layer is then formed on the first insulating layer and on top of the exposed first region of the bottom plate. A second opening is formed through the insulating layer and the first insulating layer to expose a second region of the bottom plate. A top plate is formed within the first opening and a via is formed within the second opening.
摘要翻译： 公开了一种嵌入式薄膜电容器及其制造方法。 嵌入式薄膜电容器包括由电介质层分开的两个导电板。 在实施例中，电容器封装在封装衬底内。 形成嵌入式薄膜电容器的方法包括在底板和第一迹线上形成第一绝缘层。 然后在第一绝缘层中形成第一开口以暴露底板的第一区域。 然后在第一绝缘层上和在底板的暴露的第一区域的顶部上形成粘合剂层。 通过绝缘层和第一绝缘层形成第二开口以露出底板的第二区域。 顶板形成在第一开口内，并在第二开口内形成通孔。
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公开(公告)号：US20150325491A1
公开(公告)日：2015-11-12
申请号：US14273754
申请日：2014-05-09
申请人： Aleksandar Aleksov , Dilan Seneviratne , Charavana K. Gurumurthy , Ching-Ping J. Shen , Daniel N. Sobieski
发明人： Aleksandar Aleksov , Dilan Seneviratne , Charavana K. Gurumurthy , Ching-Ping J. Shen , Daniel N. Sobieski
CPC分类号： H01L21/561 , H01L21/568 , H01L21/78 , H01L23/293 , H01L23/3107 , H01L23/3135 , H01L23/564 , H01L24/45 , H01L24/48 , H01L24/85 , H01L24/96 , H01L2224/16245 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/48091 , H01L2224/48106 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/06 , H01L2924/062 , H01L2924/0715 , H01L2924/181 , H01L2924/1811 , H01L2924/186 , H01L2924/00012 , H01L2224/85399 , H01L2224/05599
摘要： Microelectronic systems encapsulated in a stretchable/flexible material, which is skin/bio-compatible and able to withstand environmental conditions. In one embodiment of the present description, the microelectronic system includes a microelectronic device that is substantially encapsulated in a non-permeable encapsulant, such as, butyl rubbers, ethylene propylene rubbers, fluoropolymer elastomers, or combinations thereof. In another embodiment, the microelectronic system includes a microelectronic device that is substantially encapsulated in a permeable encapsulant, such as polydimethylsiloxane, wherein a non-permeable encapsulant substantially encapsulates the permeable encapsulant.
摘要翻译： 微电子系统封装在可拉伸/柔性材料中，其具有皮肤/生物相容性并能够承受环境条件。 在本说明书的一个实施例中，微电子系统包括微电子器件，其基本上封装在不可渗透的密封剂中，例如丁基橡胶，乙烯丙烯橡胶，含氟聚合物弹性体或其组合。 在另一个实施方案中，微电子系统包括基本上封装在可渗透的密封剂（例如聚二甲基硅氧烷）中的微电子器件，其中非渗透性密封剂基本上封装可渗透的密封剂。
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5.发明申请THIN FILM BASED ELECTROMAGNETIC INTERFERENCE SHIELDING WITH BBUL/CORELESS PACKAGES 有权基于薄膜电磁干扰屏蔽与BBUL /无线封装公开(公告)号：US20150282395A1
公开(公告)日：2015-10-01
申请号：US14227929
申请日：2014-03-27
CPC分类号： H05K3/007 , C23C14/14 , H01L21/4857 , H01L21/561 , H01L21/568 , H01L23/3128 , H01L23/49811 , H01L23/49822 , H01L23/5389 , H01L23/552 , H01L24/19 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/16227 , H01L2224/19 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2924/1815 , H01L2924/18162 , H05K1/0219 , H05K1/185 , H05K3/02 , H05K3/30 , H05K3/4682 , H05K2201/0715 , H05K2203/1469 , H05K2203/308 , H01L2224/83 , H01L2224/82 , H01L2224/83005
摘要： An apparatus including a die including a device side with contact points and lateral sidewalls defining a thickness of the die; a build-up carrier coupled to the die, the build-up carrier including a plurality of alternating layers of patterned conductive material and insulating material, wherein at least one of the layers of patterned conductive material is coupled to one of the contact points of the die; and an interference shield including a conductive material disposed on the die and a portion of the build-up carrier. The apparatus may be connected to a printed circuit board. A method including forming a build-up carrier adjacent a device side of a die including a plurality of alternating layers of patterned conductive material and insulating material; and forming a interference shield on a portion of the build-up carrier.
摘要翻译： 一种包括模具的装置，包括具有限定模具的厚度的接触点和侧壁的装置侧; 耦合到管芯的积聚载体，所述堆积载体包括多个图案化导电材料和绝缘材料的交替层，其中图案化导电材料层中的至少一层耦合到 死; 以及包括设置在管芯上的导电材料和积聚载体的一部分的干涉屏蔽。 该装置可以连接到印刷电路板。 一种方法，包括在包括图案化导电材料和绝缘材料的多个交替层的模具的器件侧附近形成堆积载体; 以及在积聚载体的一部分上形成干涉屏蔽。
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6.发明申请BUMPLESS BUILD-UP LAYER (BBUL) SEMICONDUCTOR PACKAGE WITH ULTRA-THIN DIELECTRIC LAYER 有权无刷建立层（BBUL）半导体封装超薄电介质层公开(公告)号：US20140264830A1
公开(公告)日：2014-09-18
申请号：US13801859
申请日：2013-03-13
IPC分类号： H01L23/498
CPC分类号： H01L23/49822 , H01L21/76807 , H01L21/7681 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L24/19 , H01L2221/1026 , H01L2224/12105 , H01L2924/18162
摘要： Bumpless build-up layer (BBUL) semiconductor packages with ultra-thin dielectric layers are described. For example, an apparatus includes a semiconductor die including an integrated circuit having a plurality of external conductive bumps. A semiconductor package houses the semiconductor die. The semiconductor package includes a dielectric layer disposed above the plurality of external conductive bumps. A conductive via is disposed in the dielectric layer and coupled to one of the plurality of conductive bumps. A conductive line is disposed on the dielectric layer and coupled to the conductive via.
摘要翻译： 描述了具有超薄电介质层的无创积层（BBUL）半导体封装。 例如，一种装置包括具有多个外部导电凸块的集成电路的半导体管芯。 半导体封装容纳半导体管芯。 半导体封装包括设置在多个外部导电凸块上方的电介质层。 导电通孔设置在电介质层中并耦合到多个导电凸块之一。 导电线设置在电介质层上并耦合到导电通孔。
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7.发明授权Bumpless build-up layer (BBUL) semiconductor package with ultra-thin dielectric layer 有权无创积层（BBUL）半导体封装，具有超薄介电层公开(公告)号：US09520350B2
公开(公告)日：2016-12-13
申请号：US13801859
申请日：2013-03-13
IPC分类号： H01L23/498 , H01L23/532 , H01L21/768 , H01L23/00
CPC分类号： H01L23/49822 , H01L21/76807 , H01L21/7681 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L24/19 , H01L2221/1026 , H01L2224/12105 , H01L2924/18162
摘要： Bumpless build-up layer (BBUL) semiconductor packages with ultra-thin dielectric layers are described. For example, an apparatus includes a semiconductor die including an integrated circuit having a plurality of external conductive bumps. A semiconductor package houses the semiconductor die. The semiconductor package includes a dielectric layer disposed above the plurality of external conductive bumps. A conductive via is disposed in the dielectric layer and coupled to one of the plurality of conductive bumps. A conductive line is disposed on the dielectric layer and coupled to the conductive via.
摘要翻译： 描述了具有超薄电介质层的无创积层（BBUL）半导体封装。 例如，一种装置包括具有多个外部导电凸块的集成电路的半导体管芯。 半导体封装容纳半导体管芯。 半导体封装包括设置在多个外部导电凸块上方的电介质层。 导电通孔设置在电介质层中并耦合到多个导电凸块之一。 导电线设置在电介质层上并耦合到导电通孔。
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8.发明申请DEVICE, SYSTEM AND METHOD FOR PROVIDING MEMS STRUCTURES OF A SEMICONDUCTOR PACKAGE 有权用于提供半导体封装的MEMS结构的器件，系统和方法公开(公告)号：US20150084139A1
公开(公告)日：2015-03-26
申请号：US14129541
申请日：2013-09-25
申请人： Weng Hong Teh , Tarek A. Ibrahim , Sarah K. Haney , Daniel N. Sobieski , Parshuram B. Zantye , Chad E. Mair , Telesphor Kamgaing
发明人： Weng Hong Teh , Tarek A. Ibrahim , Sarah K. Haney , Daniel N. Sobieski , Parshuram B. Zantye , Chad E. Mair , Telesphor Kamgaing
CPC分类号： B81C1/00246 , B81B2201/0271 , B81C1/00261 , B81C1/00277 , H01L21/568 , H01L24/19 , H01L2224/04105 , H01L2224/73267 , H01L2924/01079
摘要： Techniques and mechanisms for providing precisely fabricated structures of a semiconductor package. In an embodiment, a build-up carrier of the semiconductor package includes a layer of porous dielectric material. Seed copper and plated copper is disposed on the layer of porous dielectric material. Subsequent etching is performed to remove copper adjacent to the layer of porous dielectric material, forming a gap separating a suspended portion of a MEMS structure from the layer of porous dielectric material. In another embodiment, the semiconductor package includes a copper structure disposed between portions of an insulating layer or portions of a layer of silicon nitride material. The layer of silicon nitride material couples the insulating layer to another insulating layer. One or both of the insulating layers are each protected from desmear processing with a respective release layer structure.
摘要翻译： 用于提供半导体封装的精确制造结构的技术和机构。 在一个实施例中，半导体封装的积聚载体包括多孔介电材料层。 种子铜和电镀铜设置在多孔电介质材料层上。 进行随后的蚀刻以去除邻近多孔介电材料层的铜，形成将MEMS结构的悬置部分与多孔介电材料层分开的间隙。 在另一个实施例中，半导体封装包括设置在绝缘层的一部分之间或者氮化硅材料层的一部分的铜结构。 氮化硅材料层将绝缘层耦合到另一绝缘层。 每个绝缘层中的一个或两个保护层不受去离子处理的剥离层结构的剥离。
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公开(公告)号：US20140353019A1
公开(公告)日：2014-12-04
申请号：US13906229
申请日：2013-05-30
CPC分类号： H05K3/4644 , B32B38/10 , B32B43/006 , C23C14/228 , H01L21/44 , H01L21/48 , H01L21/565 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2924/15311 , H05K3/0014 , H05K3/0035 , H05K3/0044 , H05K3/0055 , H05K3/107 , H05K3/281 , H05K3/42 , H05K2203/0554 , H05K2203/1105 , H05K2203/1152 , Y10T156/1168 , Y10T156/1978
摘要： Embodiments of the present disclosure are directed towards techniques and configurations for formation of a dielectric with a smooth surface. In one embodiment, a method includes providing a dielectric with first and second surfaces, a conductive feature formed on the first surface, and a laminate applied to the second surface, curing the second surface while the laminate remains applied, and removing the laminate. Other embodiments may be described and/or claimed.
摘要翻译： 本公开的实施例涉及用于形成具有光滑表面的电介质的技术和配置。 在一个实施例中，一种方法包括提供具有第一表面和第二表面的电介质，形成在第一表面上的导电特征，以及施加到第二表面的层压板，在层压体保持施加时固化第二表面，以及去除层压体。 可以描述和/或要求保护其他实施例。
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