公开(公告)号：US11094659B2

公开(公告)日：2021-08-17

申请号：US16588304

申请日：2019-09-30

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K Koduri

IPC: H01L23/00

Abstract: A microelectronic device has a die with a die conductor at a connection surface. The microelectronic device includes a pillar electrically coupled to the die conductor, and a head electrically coupled to the pillar. The pillar has a die-side flared end at a die end of the pillar; the pillar widens progressively along the die-side flared end, and extends outward by more than a lesser of half a thickness of the die conductor and half a lateral width of the pillar midway between a die end and a head end. The pillar has a head-side flared end at a head end of the pillar; the pillar widens progressively along the die-side flared end, and extends outward by a distance that is greater than a lesser of half a thickness of the head and half the lateral width of the pillar. Methods of forming the microelectronic device are disclosed.

公开(公告)号：US20190109093A1

公开(公告)日：2019-04-11

申请号：US16042661

申请日：2018-07-23

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K Koduri

IPC: H01L23/552 ,  H01L23/488 ,  H01L23/00

Abstract: A microelectronic device includes a die with input/output (I/O) terminals, and a dielectric layer on the die. The microelectronic device includes electrically conductive pillars which are electrically coupled to the I/O terminals, and extend through the dielectric layer to an exterior of the microelectronic device. Each pillar includes a column electrically coupled to one of the I/O terminals, and a head contacting the column at an opposite end of the column from the I/O terminal. The head extends laterally past the column in at least one lateral direction. Methods of forming the pillars and the dielectric layer are disclosed.

公开(公告)号：US12177988B2

公开(公告)日：2024-12-24

申请号：US17374946

申请日：2021-07-13

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K Koduri

IPC: H05K3/34 ,  H05K1/02 ,  H05K3/28 ,  H05K3/38

Abstract: A microelectronic device includes a die less than 300 microns thick, and an interface tile. Die attach leads on the interface tile are electrically coupled to die terminals on the die through interface bonds. The microelectronic device includes an interposer between the die and the interface tile. Lateral perimeters of the die, the interposer, and the interface tile are aligned with each other. The microelectronic device may be formed by forming the interface bonds and an interposer layer, while the die is part of a wafer and the interface tile is part of an interface lamina. Kerfs are formed through the interface lamina, through the interposer, and partway through the wafer, around a lateral perimeter of the die. Material is subsequently removed at a back surface of the die to the kerfs, so that a thickness of the die is less than 300 microns.

公开(公告)号：US20240162163A1

公开(公告)日：2024-05-16

申请号：US18461478

申请日：2023-09-05

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K Koduri

IPC: H01L23/552 ,  H01L23/00 ,  H01L23/488

CPC classification number: H01L23/552 ,  H01L23/488 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/95 ,  H01L2224/03318 ,  H01L2224/0401 ,  H01L2224/05006 ,  H01L2224/05007 ,  H01L2224/05025 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05186 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05568 ,  H01L2224/05655 ,  H01L2224/11312 ,  H01L2224/1146 ,  H01L2224/11472 ,  H01L2224/1191 ,  H01L2224/13012 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13562 ,  H01L2224/1357 ,  H01L2224/13618 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13669 ,  H01L2224/1368 ,  H01L2224/13681 ,  H01L2224/13684 ,  H01L2224/1403 ,  H01L2224/16058 ,  H01L2224/16227 ,  H01L2224/17107 ,  H01L2224/32227 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83193

Abstract: A microelectronic device includes a die with input/output (I/O) terminals, and a dielectric layer on the die. The microelectronic device includes electrically conductive pillars which are electrically coupled to the I/O terminals, and extend through the dielectric layer to an exterior of the microelectronic device. Each pillar includes a column electrically coupled to one of the I/O terminals, and a head contacting the column at an opposite end of the column from the I/O terminal. The head extends laterally past the column in at least one lateral direction. Methods of forming the pillars and the dielectric layer are disclosed.

公开(公告)号：US11640968B2

公开(公告)日：2023-05-02

申请号：US16182111

申请日：2018-11-06

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K Koduri

IPC: H01L49/02 ,  H01L23/00

Abstract: A microelectronic device has bump bonds and an inductor on a die. The microelectronic device includes first lateral conductors extending along a terminal surface of the die, wherein at least some of the first lateral conductors contact at least some of terminals of the die. The microelectronic device also includes conductive columns on the first lateral conductors, extending perpendicularly from the terminal surface, and second lateral conductors on the conductive columns, opposite from the first lateral conductors, extending laterally in a plane parallel to the terminal surface. A first set of the first lateral conductors, the conductive columns, and the second lateral conductors provide the bump bonds of the microelectronic device. A second set of the first lateral conductors, the conductive columns, and the second lateral conductors are electrically coupled in series to form the inductor. Methods of forming the microelectronic device are also disclosed.

公开(公告)号：US11094620B2

公开(公告)日：2021-08-17

申请号：US16588138

申请日：2019-09-30

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K Koduri

IPC: H01L23/495 ,  H01L23/00 ,  H01L21/48 ,  H01L21/288 ,  H01L21/56 ,  H01L49/02

Abstract: A microelectronic device has a die with a first electrically conductive pillar, and a second electrically conductive pillar, mechanically coupled to the die. The microelectronic device includes a first electrically conductive extended head electrically coupled to the first pillar, and a second electrically conductive extended head electrically coupled to the second pillar. The first pillar and the second pillar have equal compositions of electrically conductive material, as a result of being formed concurrently. Similarly, the first extended head and the second extended head have equal compositions of electrically conductive material, as a result of being formed concurrently. The first extended head provides a bump pad, and the second extended head provides at least a portion of a first plate of an integrated capacitor. A second plate may be located in the die, between the first plate and the die, or on an opposite of the first plate from the die.

公开(公告)号：US10658278B2

公开(公告)日：2020-05-19

申请号：US16104049

申请日：2018-08-16

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K Koduri

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00

Abstract: In described examples, a terminal (e.g., a conductive terminal) includes a base material, a plating stack and a solder finish. The base material can be a metal, such as copper. The plating stack is arranged on a surface of the base material, and includes breaks in the plating stack. The breaks in the plating stack extend from a first surface of the plating stack to a second surface of the plating stack adjacent to the surface of the base material. The solder finish is coated over the breaks in the plating stack.

公开(公告)号：US20190109108A1

公开(公告)日：2019-04-11

申请号：US16030371

申请日：2018-07-09

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan K Koduri

IPC: H01L23/00

Abstract: A microelectronic device has a bump bond structure including an electrically conductive pillar with an expanded head, and solder on the expanded head. The electrically conductive pillar includes a column extending from an I/O pad to the expanded head. The expanded head extends laterally past the column on at least one side of the electrically conductive pillar. In one aspect, the expanded head may have a rounded side profile with a radius approximately equal to a thickness of the expanded head, and a flat top surface. In another aspect, the expanded head may extend past the column by different lateral distances in different lateral directions. In a further aspect, the expanded head may have two connection areas for making electrical connections to two separate nodes. Methods for forming the microelectronic device are disclosed.