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    STATE SHARING BETWEEN SMART NICS
    11.
    发明公开
    STATE SHARING BETWEEN SMART NICS 审中-公开

    公开(公告)号：US20230195675A1

    公开(公告)日：2023-06-22

    申请号：US17560148

    申请日：2021-12-22

    Applicant: VMware, Inc.

    Inventor： Boon S. Ang ,  Wenyi Jiang ,  Guolin Yang ,  Jin Heo

    IPC: G06F13/42 ,  G06F13/38

    CPC classification number: G06F13/4282 ,  G06F13/387 ,  G06F2213/3808 ,  G06F2213/0026

    Abstract: Some embodiments provide a method for synchronizing state between multiple smart NICs of a host computer that perform operations using dynamic state information. At a first smart NIC of the plurality of smart NICs, the method stores a set of dynamic state information. The method synchronizes the set of dynamic state information across a communication channel that connects the smart NICs so that each of the smart NICs also stores the set of dynamic state information.

    FAST SOFTWARE L2 SWITCHING USING A CACHING TECHNIQUE
    12.
    发明申请
    FAST SOFTWARE L2 SWITCHING USING A CACHING TECHNIQUE 审中-公开

    公开(公告)号：US20170180251A1

    公开(公告)日：2017-06-22

    申请号：US15451396

    申请日：2017-03-06

    Applicant: VMware, Inc.

    Inventor： Jin Heo ,  Jui-Ting Weng

    IPC: H04L12/747 ,  H04L12/743 ,  H04L12/46 ,  H04L29/12

    CPC classification number: H04L45/742 ,  H04L12/4641 ,  H04L45/745 ,  H04L45/7453 ,  H04L61/6022

    Abstract: In a system that includes a physical forwarding element (PFE), the mapping of each possible destination MAC address to a destination port number of the PFE is stored in a mapping table. A destination port number on the PFE is identified for a first packet in a sequence of packets arrived at a source port of the PFE by searching the mapping table and stores the destination port number in a caching table. For each packet after the first packet, when the destination MAC address of the packet matches the destination MAC address stored in the caching table, the destination port number stored in the caching table is used as the destination port number of the packet. Otherwise, a destination port number for the packet is identified by searching the mapping table and the destination port number stored in the caching table is replaced with the identified destination port number.

    Fast software L2 switching using a caching technique
    13.
    发明授权
    Fast software L2 switching using a caching technique 有权
    快速软件L2切换使用缓存技术

    公开(公告)号：US09590904B2

    公开(公告)日：2017-03-07

    申请号：US14566405

    申请日：2014-12-10

    Applicant: VMware, Inc.

    Inventor： Jin Heo ,  Jui-Ting Weng

    IPC: H04L12/50 ,  H04L12/747 ,  H04L12/741

    CPC classification number: H04L45/742 ,  H04L12/4641 ,  H04L45/745 ,  H04L45/7453 ,  H04L61/6022

    Abstract: In a system that includes a physical forwarding element (PFE), the mapping of each possible destination MAC address to a destination port number of the PFE is stored in a mapping table. A destination port number on the PFE is identified for a first packet in a sequence of packets arrived at a source port of the PFE by searching the mapping table and stores the destination port number in a caching table. For each packet after the first packet, when the destination MAC address of the packet matches the destination MAC address stored in the caching table, the destination port number stored in the caching table is used as the destination port number of the packet. Otherwise, a destination port number for the packet is identified by searching the mapping table and the destination port number stored in the caching table is replaced with the identified destination port number.

    Abstract translation: 在包括物理转发元件（PFE）的系统中，将每个可能的目的地MAC地址映射到PFE的目的地端口号被存储在映射表中。 通过搜索映射表并将目的地端口号存储在高速缓存表中，以PFE的源端口的分组序列中的第一个分组识别PFE上的目的端口号。 对于第一分组之后的每个分组，当分组的目的MAC地址与存储在缓存表中的目的地MAC地址匹配时，存储在高速缓存表中的目的端口号被用作分组的目的端口号。 否则，通过搜索映射表来识别分组的目的地端口号，并且将存储在高速缓存表中的目的地端口号替换为所识别的目的地端口号。

    SPECIALIZING VIRTUAL NETWORK DEVICE PROCESSING TO BYPASS FORWARDING ELEMENTS FOR HIGH PACKET RATE APPLICATIONS
    14.
    发明申请
    SPECIALIZING VIRTUAL NETWORK DEVICE PROCESSING TO BYPASS FORWARDING ELEMENTS FOR HIGH PACKET RATE APPLICATIONS 审中-公开
    将虚拟网络设备处理专用于旁路应用的高速缓存元件

    公开(公告)号：US20160182382A1

    公开(公告)日：2016-06-23

    申请号：US14574336

    申请日：2014-12-17

    Applicant: VMware, Inc.

    Inventor： Lenin Singaravelu ,  Jin Heo ,  Jui-Ting Weng ,  Ayyappan Veeraiyan ,  Yong Wang

    IPC: H04L12/815 ,  H04L29/08 ,  H04L12/26

    CPC classification number: H04L67/16 ,  G06F9/45558 ,  G06F2009/45595 ,  H04L49/70

    Abstract: A method of optimizing network processing in a system comprising a physical host and a set of physical network interface controllers (PNICs) is provided. The physical host includes a forwarding element. The method includes determining that a set of conditions is satisfied to bypass the forwarding element for exchanging packets between a particular data compute node (DCN) and a particular PNIC. The set of conditions includes the particular DCN being the only DCN connected to the forwarding element and the particular PNIC being the only PNIC connected to the forwarding element. The method exchanges packets between the particular DCN and the particular PNIC bypassing the forwarding element. The method determines that at least one condition in said set of conditions is not satisfied. The method utilizes the forwarding element to exchange packets between the particular DCN and the particular PNIC.

    Abstract translation: 提供了一种在包括物理主机和一组物理网络接口控制器（PNIC）的系统中优化网络处理的方法。 物理主机包括转发元素。 该方法包括确定满足一组条件以绕过用于在特定数据计算节点（DCN）和特定PNIC之间交换分组的转发元件。 该组条件包括特定DCN是连接到转发元件的唯一DCN，特定的PNIC是连接到转发元件的唯一PNIC。 该方法在特定DCN和绕过转发元件的特定PNIC之间交换数据包。 该方法确定不满足所述条件集合中的至少一个条件。 该方法利用转发元件在特定DCN和特定PNIC之间交换分组。

    SMART NIC LEADER ELECTION
    15.
    发明公开
    SMART NIC LEADER ELECTION 审中-公开

    公开(公告)号：US20230198833A1

    公开(公告)日：2023-06-22

    申请号：US17560153

    申请日：2021-12-22

    Applicant: VMware, Inc.

    Inventor： Boon S. Ang ,  Wenyi Jiang ,  Guolin Yang ,  Jin Heo

    IPC: H04L41/0803 ,  G06F9/455

    CPC classification number: H04L41/0803 ,  G06F9/45558 ,  G06F2009/45595

    Abstract: Some embodiments provide a method for a first smart NIC of multiple smart NICs of a host computer. Each of the smart NICs is for performing virtual networking operations for a set of data compute machines executing on the host computer. The method determines that the first smart NIC is elected to communicate with a network management and control system that configures the virtual networking operations. The method receives a set of configuration data for the virtual networking operations from the network management and control system. The method provides the received set of configuration data to the other smart NICs of the host computer.

    Flow processing offload using virtual port identifiers
    16.
    发明授权
    Flow processing offload using virtual port identifiers 有权

    公开(公告)号：US11606310B2

    公开(公告)日：2023-03-14

    申请号：US17114975

    申请日：2020-12-08

    Applicant: VMware, Inc.

    Inventor： Boon S. Ang ,  Wenyi Jiang ,  Guolin Yang ,  Jin Heo ,  Srividya Murali

    IPC: H04L12/801 ,  H04L47/80 ,  H04L49/00 ,  H04L45/00 ,  H04L47/78 ,  H04L47/12 ,  H04L49/109

    Abstract: Some embodiments of the invention provide a method for providing flow processing offload (FPO) for a host computer at a physical network interface card (pNIC) connected to the host computer. A set of compute nodes executing on the host computer are each associated with a set of interfaces that are each assigned a locally-unique virtual port identifier (VPID) by a flow processing and action generator. The pNIC includes a set of interfaces that are assigned physical port identifiers (PPIDs) by the pNIC. The method includes receiving a data message at an interface of the pNIC and matching the data message to a stored flow entry that specifies a destination using a VPID. The method also includes identifying, using the VPID, a PPID as a destination of the received data message by performing a lookup in a mapping table storing a set of VPIDs and a corresponding set of PPIDs and forwarding the data message to an interface of the pNIC associated with the identified PPID.

    VIRTUAL PERFORMANCE MONITORING DECOUPLED FROM HARDWARE PERFORMANCE-MONITORING UNITS
    18.
    发明申请
    VIRTUAL PERFORMANCE MONITORING DECOUPLED FROM HARDWARE PERFORMANCE-MONITORING UNITS 审中-公开

    公开(公告)号：US20170353534A1

    公开(公告)日：2017-12-07

    申请号：US15687057

    申请日：2017-08-25

    Applicant: VMware, Inc.

    Inventor： Reza Taheri ,  Kalyan Saladi ,  Daniel Michael Hecht ,  Jin Heo ,  Jeffrey Buell

    IPC: H04L29/08 ,  H04L12/26

    CPC classification number: H04L67/10 ,  H04L43/00 ,  H04L67/1097

    Abstract: The current document is directed to virtualized PMUs provided by virtualization layers. The currently disclosed virtualized PMUs are decoupled from the underlying PMU hardware features of processors on which the virtualization layer executes. The decoupling is achieved, in part, by time multiplexing the underlying hardware PMU registers to provide a greater number of virtualized PMU registers than the number of hardware-PMU registers provided by at least some of the underlying hardware PMUs. The decoupling is also achieved by providing for monitoring, by the virtualized PMU registers, of computed processor events and approximated processor events in addition to the processor events monitored by the underlying hardware PMUs. In addition, the virtualized PMU registers are implemented, in certain implementations, to support a variety of different monitoring modes, including monitoring of processor events that occur only during execution of the virtualization layer and monitoring of hardware-thread-specific processor events.

    Virtual performance monitoring decoupled from hardware performance-monitoring units
    20.
    发明授权
    Virtual performance monitoring decoupled from hardware performance-monitoring units 有权

    公开(公告)号：US09756118B2

    公开(公告)日：2017-09-05

    申请号：US14263640

    申请日：2014-04-28

    Applicant: VMware, Inc.

    Inventor： Reza Taheri ,  Kalyan Saladi ,  Daniel Michael Hecht ,  Jin Heo ,  Jeffrey Buell

    IPC: G06F9/455 ,  H04L29/08 ,  H04L12/26

    CPC classification number: H04L67/10 ,  H04L43/00 ,  H04L67/1097

    Abstract: The current document is directed to virtualized PMUs provided by virtualization layers. The currently disclosed virtualized PMUs are decoupled from the underlying PMU hardware features of processors on which the virtualization layer executes. The decoupling is achieved, in part, by time multiplexing the underlying hardware PMU registers to provide a greater number of virtualized PMU registers than the number of hardware-PMU registers provided by at least some of the underlying hardware PMUs. The decoupling is also achieved by providing for monitoring, by the virtualized PMU registers, of computed processor events and approximated processor events in addition to the processor events monitored by the underlying hardware PMUs. In addition, the virtualized PMU registers are implemented, in certain implementations, to support a variety of different monitoring modes, including monitoring of processor events that occur only during execution of the virtualization layer and monitoring of hardware-thread-specific processor events.

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