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公开(公告)号：US07502975B2
公开(公告)日：2009-03-10
申请号：US11755622
申请日：2007-05-30
申请人： Takeshi Nagai , Yoshihiro Kikuchi , Tadaaki Masuda
发明人： Takeshi Nagai , Yoshihiro Kikuchi , Tadaaki Masuda
IPC分类号： G01R31/28
CPC分类号： H04N21/6377 , H04L1/0002 , H04L1/0009 , H04L1/0014 , H04L1/0015 , H04L1/0019 , H04L1/0026 , H04L1/205 , H04L47/10 , H04L47/11 , H04L47/25 , H04L47/283 , H04N21/658
摘要： A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.
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公开(公告)号：US07496807B2
公开(公告)日：2009-02-24
申请号：US11755616
申请日：2007-05-30
申请人： Takeshi Nagai , Yoshihiro Kikuchi , Tadaaki Masuda
发明人： Takeshi Nagai , Yoshihiro Kikuchi , Tadaaki Masuda
IPC分类号： G01R31/28
CPC分类号： H04N21/6377 , H04L1/0002 , H04L1/0009 , H04L1/0014 , H04L1/0015 , H04L1/0019 , H04L1/0026 , H04L1/205 , H04L47/10 , H04L47/11 , H04L47/25 , H04L47/283 , H04N21/658
摘要： A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.
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公开(公告)号：US07472316B2
公开(公告)日：2008-12-30
申请号：US11584548
申请日：2006-10-23
IPC分类号： H04N5/08
CPC分类号： H04L1/0042 , G11B20/1813 , G11B27/3027 , H03M13/15 , H03M13/152 , H03M13/23 , H03M13/33 , H03M13/356 , H04J3/0602 , H04L1/0041 , H04L1/0047 , H04L1/0068 , H04L1/007 , H04L1/0075 , H04L1/0079 , H04L1/0083 , H04L7/041 , H04L7/048 , H04L2001/0098 , H04N7/56 , H04N19/00 , H04N19/61 , H04N19/68 , H04N19/70 , H04N19/89
摘要： In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.
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公开(公告)号：US07464305B2
公开(公告)日：2008-12-09
申请号：US11770348
申请日：2007-06-28
IPC分类号： H04N5/08
CPC分类号： H04L1/0042 , G11B20/1813 , G11B27/3027 , H03M13/15 , H03M13/152 , H03M13/23 , H03M13/33 , H03M13/356 , H04J3/0602 , H04L1/0041 , H04L1/0047 , H04L1/0068 , H04L1/007 , H04L1/0075 , H04L1/0079 , H04L1/0083 , H04L7/041 , H04L7/048 , H04L2001/0098 , H04N7/56 , H04N19/00 , H04N19/61 , H04N19/68 , H04N19/70 , H04N19/89
摘要： In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part for coding an input multiplexed code string to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string to assemble an output code string.
摘要翻译： 在其中纠错/检测编码与使用同步码的同步恢复技术组合的编码系统中，解决了由于错误检测引起的伪同步和失步的问题。 提供了一种用于将输入的多路复用代码串编码到包括信息位和校验位的纠错/检测码的编码部分，以及用于将同步代码插入到多个周期性预定同步代码中的任何一个中的代码串组合部分 在代码串中插入位置，用于将信息位布置在代码串中的可选位置处，并且用于将校验位排列在除了代码串中的同步代码插入位置之外的位置以组合输出代码串。
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公开(公告)号：US07464304B2
公开(公告)日：2008-12-09
申请号：US11584583
申请日：2006-10-23
IPC分类号： H04N5/08
CPC分类号： H04L1/0042 , G11B20/1813 , G11B27/3027 , H03M13/15 , H03M13/152 , H03M13/23 , H03M13/33 , H03M13/356 , H04J3/0602 , H04L1/0041 , H04L1/0047 , H04L1/0068 , H04L1/007 , H04L1/0075 , H04L1/0079 , H04L1/0083 , H04L7/041 , H04L7/048 , H04L2001/0098 , H04N7/56 , H04N19/00 , H04N19/61 , H04N19/68 , H04N19/70 , H04N19/89
摘要： In a coding system wherein an error correction/detection coding is combined with a synchronization recovering technique using a synchronization code, the problems of a pseudo synchronization and a step out due to error detection are solved. There is provided a coding part 212 for coding an input multiplexed code string 201 to an error correcting/detecting code comprising an information bit and a check bit, and code string assembling part 213 for inserting a synchronization code into any one of a plurality of periodically predetermined synchronization code inserting positions in the code string 201, for arranging the information bit at an optional position in the code string, and for arranging the check bit at a position other than the synchronization code inserting positions in the code string 201 to assemble an output code string 205.
摘要翻译： 在其中纠错/检测编码与使用同步码的同步恢复技术组合的编码系统中，解决了由于错误检测引起的伪同步和失步的问题。 提供了一个用于将输入的多路复用代码串201编码到包括信息位和校验位的纠错/检测码的编码部分212，以及代码串组合部分213，用于将同步码插入多个周期性的任一个 代码串201中的预定同步代码插入位置，用于将信息位布置在代码串中的可选位置处，并且用于将校验位排列在代码串201中的同步代码插入位置以外的位置，以组合输出 代码串205。
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16.发明授权公开(公告)号：US07457994B2
公开(公告)日：2008-11-25
申请号：US11418105
申请日：2006-05-05
IPC分类号： H03M13/05
CPC分类号： H03M13/27 , G11B20/1813 , G11B27/3027 , H03M13/33 , H03M13/356 , H04J3/0602 , H04J3/0605 , H04J3/07 , H04L1/004 , H04L1/0041 , H04L1/0046 , H04L1/0072 , H04L1/0083 , H04L7/041 , H04L7/048 , H04L2001/0098 , H04N7/56 , H04N19/00 , H04N19/61 , H04N19/70 , H04N19/89 , H04N21/2383 , H04N21/4382
摘要： An output coding apparatus includes a coder for coding an inputted bitstream to an error correction and/or detection code composed of information bits and check bits; and a bitstream assembling section for assembling an outputted bitstream by inserting a synchronization code at any one of a plurality of synchronization code insertion positions previously determined in the outputted bitstream, arranging the information bits at any desired positions of the bitstream, and by arranging the check bits at positions other than the synchronization code insertion positions in the bitstream. Therefore, when the coding apparatus is combined with a resynchronization method using both an error correction and/or detection code and a synchronization code, it is possible to solve a problem caused by pseudo-synchronization or synchronization-loss pull-out or step-out due to erroneous detection of the synchronization code.
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17.发明授权Coding apparatus and decoding apparatus for transmission/storage of information using synchronization code 失效用于使用同步码发送/存储信息的编码装置和解码装置公开(公告)号：US07441162B2
公开(公告)日：2008-10-21
申请号：US11418106
申请日：2006-05-05
IPC分类号： H03M13/05
CPC分类号： H03M13/27 , G11B20/1813 , G11B27/3027 , H03M13/33 , H03M13/356 , H04J3/0602 , H04J3/0605 , H04J3/07 , H04L1/004 , H04L1/0041 , H04L1/0046 , H04L1/0072 , H04L1/0083 , H04L7/041 , H04L7/048 , H04L2001/0098 , H04N7/56 , H04N19/00 , H04N19/61 , H04N19/70 , H04N19/89 , H04N21/2383 , H04N21/4382
摘要： An output coding apparatus includes a coder for coding an inputted bitstream to an error correction and/or detection code composed of information bits and check bits; and a bitstream assembling section for assembling an outputted bitstream by inserting a synchronization code at any one of a plurality of synchronization code insertion positions previously determined in the outputted bitstream, arranging the information bits at any desired positions of the bitstream, and by arranging the check bits at positions other than the synchronization code insertion positions in the bitstream. Therefore, when the coding apparatus is combined with a resynchronization method using both an error correction and/or detection code and a synchronization code, it is possible to solve a problem caused by pseudo-synchronization or synchronization-loss pull-out or step-out due to erroneous detection of the synchronization code.
摘要翻译： 输出编码装置包括：编码器，用于将输入的比特流编码到由信息比特和校验比特组成的纠错和/或检测码; 以及比特流组合部分，用于通过在先前在输出的比特流中预先确定的多个同步码插入位置中的任一个插入同步码来组合输出的比特流，将信息比特排列在比特流的任何所需位置，并且通过布置检查 比特流中的同步码插入位置以外的位。 因此，当编码装置与使用错误校正和/或检测码和同步码的再同步方法组合时，可以解决由伪同步或同步丢失拉出或失步引起的问题 由于同步码的错误检测。
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18.发明授权Moving picture coding and/or decoding systems, and variable-length coding and/or decoding system 有权运动图像编码和/或解码系统以及可变长度编码和/或解码系统公开(公告)号：US07388914B2
公开(公告)日：2008-06-17
申请号：US11686790
申请日：2007-03-15
IPC分类号： H04N7/18
CPC分类号： H04N19/69 , H04N19/152 , H04N19/159 , H04N19/176 , H04N19/187 , H04N19/37 , H04N19/46 , H04N19/52 , H04N19/61 , H04N19/65 , H04N19/66 , H04N19/70 , H04N19/89 , H04N19/93
摘要： A coding and/or decoding system includes: a code-word table for storing therein a plurality of code words, which are capable of being decoded both in forward and backward directions and which are formed so that delimiters of the code words are capable of being identified by a predetermined weight of the code words, so that the code words correspond to different source symbols; an encoder for selecting code words corresponding to inputted source symbols from the code-word table; and a synchronization interval setting part for preparing coded data every predetermined interval using the code words selected by the encoder and for inserting stuffing codes capable of being decoded in the backward direction. Thus, it is possible to decrease useless bit patterns to enhance the coding efficiency by smaller amounts of calculation and storage, and to decode variable length codes both in the forward and backward directions even if the synchronization interval is set every interval using the stuffing bits.
摘要翻译： 编码和/或解码系统包括：码字表，用于在其中存储多个码字，其能够在前向和后向被解码，并且形成为使得码字的分隔符能够被 由代码字的预定权重识别，使得码字对应于不同的源符号; 编码器，用于从码字表中选择与输入的源符号对应的码字; 以及同步间隔设定部分，用于使用由编码器选择的代码字，每隔预定间隔准备编码数据，并用于插入能够沿向后方向解码的填充码。 因此，可以减少无用的位模式，通过更少的计算和存储量来提高编码效率，并且即使在使用填充位的每个间隔设置同步间隔的情况下，也可以在正向和反向方向上解码可变长度代码。
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19.发明授权Information transmission method and encoding/decoding apparatus and encoding-multiplexing/decoding-demultiplexing apparatus in information transmission system to which information transmission method is applied 失效信息发送方法以及应用信息传输方式的信息传输系统中的编码/解码装置和编码 - 复用/解码 - 解复用装置公开(公告)号：US07269170B2
公开(公告)日：2007-09-11
申请号：US10319661
申请日：2002-12-16
IPC分类号： H04L12/28
CPC分类号： H04N21/4382 , H04L1/0041 , H04L1/0072 , H04L1/0075 , H04N7/52 , H04N19/65 , H04N19/66 , H04N19/68 , H04N19/69 , H04N19/70 , H04N19/89 , H04N21/235 , H04N21/2368 , H04N21/242 , H04N21/4302 , H04N21/4341 , H04N21/435 , H04N21/4425 , H04N21/84 , H04N21/8455
摘要： In an information transmission method, error robustness is provided for the bit stream itself so that decoding processing can be properly performed even in the event of an error in important information such as header information. A bit stream reconstruction circuit (107) in an encoding apparatus adds sync signals to the heads of encoded data streams, which are encoded by an encoder (103), in certain bit stream units, and then inserts designation information in each bit stream by using a designation information insertion circuit (106). Each designation information indicates the addition of information for reconstructing important header information. By inserting the designation information in the bit stream obtained, reconstruction information can be added to the bit stream. Even if, therefore, an error is introduced into the header information, and the information cannot be used for decoding processing, the decoding processing can be properly continued by using the new reconstruction information designated by the designation information as a substitute.
摘要翻译： 在信息传输方法中，为比特流本身提供错误鲁棒性，使得即使在诸如标题信息的重要信息中的错误的情况下也可以适当地执行解码处理。 编码装置中的比特流重构电路（107）将某些比特流单元将同步信号加到由编码器（103）编码的编码数据流的头部，然后使用 指定信息插入电路（106）。 每个指定信息指示用于重建重要标题信息的信息的添加。 通过将指定信息插入到获得的比特流中，可以将重构信息添加到比特流中。 因此，即使在标题信息中引入错误，并且信息不能用于解码处理，因此可以通过使用由指定信息指定的新的重建信息作为替代来适当地继续解码处理。
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20.发明申请公开(公告)号：US20070205928A1
公开(公告)日：2007-09-06
申请号：US11686807
申请日：2007-03-15
IPC分类号： H03M7/40
CPC分类号： H04N19/69 , H04N19/152 , H04N19/159 , H04N19/176 , H04N19/187 , H04N19/37 , H04N19/46 , H04N19/52 , H04N19/61 , H04N19/65 , H04N19/66 , H04N19/70 , H04N19/89 , H04N19/93
摘要： A coding and/or decoding system includes: a code-word table for storing therein a plurality of code words, which are capable of being decoded both in forward and backward directions and which are formed so that delimiters of the code words are capable of being identified by a predetermined weight of the code words, so that the code words correspond to different source symbols; an encoder for selecting code words corresponding to inputted source symbols from the code-word table; and a synchronization interval setting part for preparing coded data every predetermined interval using the code words selected by the encoder and for inserting stuffing codes capable of being decoded in the backward direction. Thus, it is possible to decrease useless bit patterns to enhance the coding efficiency by smaller amounts of calculation and storage, and to decode variable length codes both in the forward and backward directions even if the synchronization interval is set every interval using the stuffing bits.
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