公开(公告)号：US09570383B2

公开(公告)日：2017-02-14

申请号：US14746247

申请日：2015-06-22

Applicant: Jin-Kyung Kim ,  Yong-hoon Kim ,  Seong-Ho Shin

Inventor： Jin-Kyung Kim ,  Yong-hoon Kim ,  Seong-Ho Shin

IPC: H01L23/02 ,  H01L23/498 ,  H05K1/18 ,  H01L23/31

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L23/49838 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/181 ,  H05K2201/09218 ,  H05K2201/10378 ,  H05K2201/10734 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Semiconductor packages, module substrates and semiconductor package modules having the same are provided. The semiconductor package module includes a module substrate provided with a plurality of signal wires on an upper surface thereof, a package substrate disposed on the module substrate, a semiconductor chip disposed on one surface of the package substrate, and a plurality of external connection terminals disposed on another surface of the package substrate.

Abstract translation: 提供半导体封装，模块基板和具有该半导体封装的半导体封装模块。 半导体封装模块包括在其上表面上设置有多个信号线的模块基板，设置在模块基板上的封装基板，设置在封装基板的一个表面上的半导体芯片，以及设置在多个外部连接端子 在封装衬底的另一个表面上。

公开(公告)号：US07547940B2

公开(公告)日：2009-06-16

申请号：US11623829

申请日：2007-01-17

Applicant: Yong-hoon Kim

Inventor： Yong-hoon Kim

IPC: H01L29/788

CPC classification number: H01L27/115 ,  H01L27/11519

Abstract: Non-volatile memory devices according to embodiments of the present invention include an EEPROM transistor in a first portion of a semiconductor substrate, an access transistor in a second portion of the semiconductor substrate and an erase transistor in a third portion of the semiconductor substrate. The second portion of the semiconductor substrate extends adjacent a first side of the first portion of the semiconductor substrate and the third portion of the semiconductor substrate extends adjacent a second side of the first portion of the semiconductor substrate. The first and second sides of the first portion of the semiconductor substrate may be opposite sides of the first portion of the semiconductor substrate. The access transistor has a first source/drain terminal electrically connected to a first source/drain terminal of the EEPROM transistor and the erase transistor has a first source/drain terminal electrically connected to a second source/drain terminal of the access transistor.

Abstract translation: 根据本发明的实施例的非易失性存储器件包括在半导体衬底的第一部分中的EEPROM晶体管，半导体衬底的第二部分中的存取晶体管和半导体衬底的第三部分中的擦除晶体管。 半导体衬底的第二部分在半导体衬底的第一部分的第一侧附近延伸，并且半导体衬底的第三部分相邻于半导体衬底的第一部分的第二侧延伸。 半导体衬底的第一部分的第一和第二侧可以是半导体衬底的第一部分的相对侧。 存取晶体管具有电连接到EEPROM晶体管的第一源极/漏极端子的第一源极/漏极端子，并且擦除晶体管具有电连接到存取晶体管的第二源极/漏极端子的第一源极/漏极端子。

公开(公告)号：US08791559B2

公开(公告)日：2014-07-29

申请号：US13604301

申请日：2012-09-05

Applicant: Yong-hoon Kim ,  Hyo-soon Kang ,  Jin-kyung Kim

Inventor： Yong-hoon Kim ,  Hyo-soon Kang ,  Jin-kyung Kim

IPC: H01L23/02 ,  H01L23/48 ,  H01L21/50

CPC classification number: H01L25/105 ,  H01L23/3128 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/0557 ,  H01L2224/06155 ,  H01L2224/06181 ,  H01L2224/1301 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/1403 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17517 ,  H01L2224/2929 ,  H01L2224/29387 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06575 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/14361 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/1579 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A semiconductor package of a package on package structure reducing an overall thickness of the package and simplifying design complexity of wiring paths is provided. The package includes a first package including a first substrate and a first semiconductor chip portion mounted thereon, a second package disposed on the first package and including a second substrate and a second semiconductor chip portion mounted thereon, and a connection member connecting the first and second substrates. The second semiconductor chip portion includes at least one semiconductor chip including a group of chip pads corresponding to one channel, and the group of chip pads is concentrated on a first edge of the semiconductor chip. An intellectual property core corresponding to the one channel is formed on an edge of the first semiconductor chip portion and the IP core corresponds to the edge on which the group of chip pads is concentrated.

Abstract translation: 提供了一种封装结构封装的半导体封装，减少了封装的整体厚度，并简化了布线路径的设计复杂性。 所述封装包括：第一封装，包括第一基板和安装在其上的第一半导体芯片部分;第二封装，设置在所述第一封装上，并且包括第二基板和安装在其上的第二半导体芯片部分;以及连接部件， 底物。 第二半导体芯片部分包括至少一个半导体芯片，其包括对应于一个通道的一组芯片焊盘，并且该组芯片焊盘集中在半导体芯片的第一边缘上。 对应于一个通道的知识产权核心形成在第一半导体芯片部分的边缘上，并且IP核心对应于芯片组集中的边缘。

公开(公告)号：US20070164347A1

公开(公告)日：2007-07-19

申请号：US11623829

申请日：2007-01-17

Applicant: Yong-hoon Kim

Inventor： Yong-hoon Kim

IPC: H01L29/788

CPC classification number: H01L27/115 ,  H01L27/11519

Abstract: Non-volatile memory devices according to embodiments of the present invention include an EEPROM transistor in a first portion of a semiconductor substrate, an access transistor in a second portion of the semiconductor substrate and an erase transistor in a third portion of the semiconductor substrate. The second portion of the semiconductor substrate extends adjacent a first side of the first portion of the semiconductor substrate and the third portion of the semiconductor substrate extends adjacent a second side of the first portion of the semiconductor substrate. The first and second sides of the first portion of the semiconductor substrate may be opposite sides of the first portion of the semiconductor substrate. The access transistor has a first source/drain terminal electrically connected to a first source/drain terminal of the EEPROM transistor and the erase transistor has a first source/drain terminal electrically connected to a second source/drain terminal of the access transistor.

Abstract translation: 根据本发明的实施例的非易失性存储器件包括在半导体衬底的第一部分中的EEPROM晶体管，半导体衬底的第二部分中的存取晶体管和半导体衬底的第三部分中的擦除晶体管。 半导体衬底的第二部分在半导体衬底的第一部分的第一侧附近延伸，并且半导体衬底的第三部分相邻于半导体衬底的第一部分的第二侧延伸。 半导体衬底的第一部分的第一和第二侧可以是半导体衬底的第一部分的相对侧。 存取晶体管具有电连接到EEPROM晶体管的第一源极/漏极端子的第一源极/漏极端子，并且擦除晶体管具有电连接到存取晶体管的第二源极/漏极端子的第一源极/漏极端子。

公开(公告)号：US06576374B1

公开(公告)日：2003-06-10

申请号：US09605429

申请日：2000-06-29

Applicant: Yong-hoon Kim

Inventor： Yong-hoon Kim

IPC: G03F900

CPC classification number: G03F1/30 ,  G03F7/09

Abstract: A mask blank includes a transparent substrate, a light shield layer formed on the upper surface of the transparent substrate, and a multi-functional protective layer formed on the light shield layer. To make a phase shift mask from the blank, the protective layer is patterned, and the light shield layer is etched using the protective layer pattern as an etch mask. The phase shift region is formed by etching a groove in the second region of the substrate while the protective layer pattern protects the light shield layer. Therefore, undesirable residue is prevented from forming at the bottom of the groove constituting the phase shift region. The method also entails patterning a photosensitive layer on the protective layer, and patterning the protective layer by using the patterned photosensitve layer as a mask. In this case, the structure is cleaned so that no residue remains on the exposed portions of the light shield layer.

Abstract translation: 掩模坯料包括透明基板，形成在透明基板的上表面上的遮光层和形成在遮光层上的多功能保护层。 为了从空白制作相移掩模，图案化保护层，并且使用保护层图案作为蚀刻掩模蚀刻遮光层。 通过在衬底的第二区域中蚀刻凹槽来形成相移区域，同时保护层图案保护遮光层。 因此，防止在构成相移区域的槽的底部形成不希望的残留物。 该方法还需要在保护层上图案化感光层，并且通过使用图案化感光层作为掩模来图案化保护层。 在这种情况下，清洁该结构，使得在遮光层的露出部分上不残留残留物。

公开(公告)号：US06307665B1

公开(公告)日：2001-10-23

申请号：US09273758

申请日：1999-03-22

Applicant: Yong-hoon Kim ,  Hang-woo Lee

Inventor： Yong-hoon Kim ,  Hang-woo Lee

IPC: G02F133

CPC classification number: G02F1/332 ,  G02F1/0316 ,  G02F1/11 ,  G02F1/113

Abstract: An acousto-optic modulator including an ultrasonic medium for controlling light from an optical source through diffraction, two transducers each having one electrode formed on one side thereof, the electrodes being for generating an acousto-elastic wave, and a conductive adhesive layer interposed between the ultrasonic medium and each of the sides of the transducers opposite to the sides on which the electrodes are installed, in order to adhere each of the transducers to the ultrasonic medium.

Abstract translation: 一种声光调制器，包括用于通过衍射控制来自光源的光的超声波介质，两个换能器，每个换能器的一侧形成有一个电极，所述电极用于产生声弹性波，以及导电粘合剂层， 超声波介质和传感器的与安装有电极的侧面相对的侧面，以便将每个换能器粘附到超声波介质上。

公开(公告)号：US6081365A

公开(公告)日：2000-06-27

申请号：US287634

申请日：1999-04-07

Applicant: Yong-hoon Kim

Inventor： Yong-hoon Kim

IPC: G02F1/11 ,  G02F1/33

CPC classification number: G02F1/11 ,  G02F2201/38

Abstract: An acousto-optic modulator comprised of an acousto-optic element coated with an anti-reflection layer, and a method of manufacturing the same, are provided. The acousto-optic modulator includes an anti-reflection layer, comprised of at least two coating layers having different refractive indices, formed on the light incident/emitting surface of an ultrasonic medium for modulating a light beam incident from an optical source.

Abstract translation: 提供了由涂覆有抗反射层的声光元件组成的声光调制器及其制造方法。 该声光调制器包括一个抗反射层，该反射层由至少两层具有不同折射率的涂层形成在超声介质的光入射/发射表面上，用于调制从光源入射的光束。

公开(公告)号：US5900966A

公开(公告)日：1999-05-04

申请号：US911700

申请日：1997-08-15

Applicant: Yong-hoon Kim ,  Hang-woo Lee

Inventor： Yong-hoon Kim ,  Hang-woo Lee

IPC: G02F1/03 ,  G02F1/11 ,  G02F1/33

CPC classification number: G02F1/332 ,  G02F1/0316 ,  G02F1/11 ,  G02F1/113

Abstract: An acousto-optic modulator having an ultrasonic medium for controlling light from a light source by diffracting the light and a transducer portion having electrodes for generating an acoustic wave in the ultrasonic medium, wherein the transducer portion includes two transducers each having an electrode. The AOM is provided with two electrodes by using two transducers, thereby facilitating impedance matching with a driver. The two transducers may be installed so that their polarization directions are opposite to each other, thereby obtaining maximum power transfer to the ultrasonic medium.

Abstract translation: 一种声光调制器，其具有用于通过衍射光来控制来自光源的光的超声介质和具有用于在超声波介质中产生声波的电极的换能器部分，其中，所述换能器部分包括两个具有电极的换能器。 通过使用两个换能器，AOM设置有两个电极，从而有助于与驱动器的阻抗匹配。 可以安装两个换能器使得它们的偏振方向彼此相反，从而获得对超声介质的最大功率传递。