Technique for photonic analog-to-digital signal conversion
    12.
    发明授权
    Technique for photonic analog-to-digital signal conversion 有权
    光子模拟 - 数字信号转换技术

    公开(公告)号:US07956788B2

    公开(公告)日:2011-06-07

    申请号:US12387301

    申请日:2009-04-30

    IPC分类号: H03M1/12

    CPC分类号: H03M1/1215 G02F7/00

    摘要: In an inventive photonic analog-to-digital signal converter (ADC), multiple opto-electric sampling devices are employed to successively sample an analog signal input. Optical clock signals having the same frequency but different clock phases are used, which are associated with the opto-electric sampling devices, respectively. Each sampling device takes samples of the analog signal input in response to the optical clock signal associated therewith. The resulting samples are processed to produce quantized samples. The inventive ADC outputs a digital signal representing the quantized samples.

    摘要翻译: 在本发明的光子模拟 - 数字信号转换器(ADC)中,采用多个光电采样装置来连续采样模拟信号输入。 使用具有相同频率但不同时钟相位的光时钟信号,它们分别与光电采样装置相关联。 每个采样装置响应于与其相关联的光时钟信号来采样模拟信号输入。 处理所得样品以产生量化样品。 本发明的ADC输出表示量化样本的数字信号。

    CMOS-COMPATIBLE TUNABLE MICROWAVE PHOTONIC BAND-STOP FILTER
    14.
    发明申请
    CMOS-COMPATIBLE TUNABLE MICROWAVE PHOTONIC BAND-STOP FILTER 有权
    CMOS兼容微波微波贴片过滤器

    公开(公告)号:US20090214223A1

    公开(公告)日:2009-08-27

    申请号:US12035677

    申请日:2008-02-22

    IPC分类号: H04B10/04

    CPC分类号: H04B10/00 H04B2210/006

    摘要: According to one embodiment, a microwave photonic band-stop (MPBS) filter uses an electrical input signal to drive an optical Mach-Zehnder modulator. A modulated optical carrier produced by the modulator is applied to an optical filter having at least two tunable spectral attenuation bands that are located substantially symmetrically on either side of the carrier frequency. The resulting filtered optical signal is applied to an optical-to-electrical (O/E) converter to produce an electrical output signal.

    摘要翻译: 根据一个实施例,微波光子带阻(MPBS)滤波器使用电输入信号来驱动光学马赫 - 曾德尔调制器。 由调制器产生的调制光载波被应用于具有至少两个可调频谱衰减频带的滤光器,该衰减频带基本对称地位于载波频率的任一侧上。 所得到的经滤波的光信号被施加到光电(O / E)转换器以产生电输出信号。

    Programmable optical array
    15.
    发明授权
    Programmable optical array 有权
    可编程光学阵列

    公开(公告)号:US07548668B2

    公开(公告)日:2009-06-16

    申请号:US11944183

    申请日:2007-11-21

    IPC分类号: G02B6/12 G02B6/35

    摘要: An apparatus having a topology that allows building complicated optical programmable arrays useful for manipulating the phase and/or amplitude of an optical signal. Sophisticated filtering and other optical signal processing functionality can be programmed into the array after a chip containing the array has been fabricated. This programming capability is analogous to that of electronic field programmable gate arrays (FPGA's). Apparatus described herein will provide a powerful tool for processing optical signals or very broadband electrical signals.

    摘要翻译: 具有拓扑结构的装置,其允许构建用于操纵光信号的相位和/或幅度的复杂的光学可编程阵列。 在制造了包含阵列的芯片之后,可以将复杂的滤波和其他光信号处理功能编程到阵列中。 这种编程能力类似于电子现场可编程门阵列(FPGA)的编程能力。 本文描述的装置将提供用于处理光信号或非常宽带电信号的强大工具。

    Dissipative isolation frames for active microelectronic devices, and methods of making such dissipative isolation frames
    16.
    发明授权
    Dissipative isolation frames for active microelectronic devices, and methods of making such dissipative isolation frames 有权
    用于有源微电子器件的耗散隔离框架,以及制造这种耗散隔离框架的方法

    公开(公告)号:US07170147B2

    公开(公告)日:2007-01-30

    申请号:US10628748

    申请日:2003-07-28

    摘要: Microelectronic apparatus having protection against high frequency crosstalk radiation, comprising: a planar insulating substrate; an active semiconductor electronic device located over a first region of the insulating substrate; and a doped semiconductor located in a second region of the insulating substrate substantially surrounding the first region. Apparatus further comprising a dissipative conductor overlaying and adjacent to the doped semiconductor. Apparatus additionally comprising metallic test probe contacts making electrical connections with the active semiconductor electronic device. Application of the apparatus to dissipate crosstalk radiation having a center frequency within a range between about 1 gigahertz and about 1,000 gigahertz. Methods for making the apparatus.

    摘要翻译: 具有防止高频串扰辐射的微电子装置,包括:平面绝缘基板; 位于所述绝缘基板的第一区域上方的有源半导体电子器件; 以及位于所述绝缘基板的第二区域中的基本上围绕所述第一区域的掺杂半导体。 装置还包括覆盖并邻近掺杂半导体的耗散导体。 装置还包括与有源半导体电子器件进行电连接的金属测试探针触点。 该装置用于消散中心频率在约1千兆赫和约1,000千兆赫之间范围内的串扰辐射。 制造装置的方法。

    NRZ-to-RZ conversion for communication systems
    17.
    发明授权
    NRZ-to-RZ conversion for communication systems 有权
    通信系统的NRZ到RZ转换

    公开(公告)号:US07155130B2

    公开(公告)日:2006-12-26

    申请号:US10085433

    申请日:2002-02-28

    IPC分类号: H04B10/04 H04B10/12

    CPC分类号: H04B10/508 H04B10/505

    摘要: A driver, e.g., for use with electro-optic (E/O) modulators. The driver is configured to generate a driving signal based on an electronic NRZ input data signal and an input clock signal. The driver converts the NRZ input data signal to an RZ format and produces an amplified RZ signal that can be applied to an E/O modulator. The amplification gain of the driver is adjustable to enable interfacing with different modulators. In one embodiment of the invention, the driving signal is generated based on a comparison between the NRZ input data signal and an offset clock signal generated from the input clock signal. The width of pulses in the driving signal, e.g., corresponding to logical “ones,” may be tuned by, e.g., changing the DC offset of the clock signal. The driver may be implemented as an ASIC configured to operate at the data rate of, e.g., 10 GBit/s.

    摘要翻译: 驱动器,例如用于电光(E / O)调制器。 驱动器被配置为基于电子NRZ输入数据信号和输入时钟信号产生驱动信号。 驱动器将NRZ输入数据信号转换为RZ格式,并产生可应用于E / O调制器的放大RZ信号。 驱动器的放大增益可调,以实现与不同调制器的连接。 在本发明的一个实施例中,基于NRZ输入数据信号与从输入时钟信号产生的偏移时钟信号之间的比较产生驱动信号。 可以通过例如改变时钟信号的DC偏移来调整驱动信号中的脉冲宽度,例如对应于逻辑“1”。 驱动器可以被实现为被配置为以例如10GBit / s的数据速率操作的ASIC。

    Flat profile structures for bipolar transistors
    18.
    发明申请
    Flat profile structures for bipolar transistors 有权
    双极晶体管的平面结构

    公开(公告)号:US20050032323A1

    公开(公告)日:2005-02-10

    申请号:US10624038

    申请日:2003-07-21

    摘要: A method for fabricating a bipolar transistor includes forming collector, base, and emitter semiconductor layers on a substrate such that the layers form a vertical sequence with respect to an adjacent surface of the substrate. The method includes etching away a portion of a top one of the semiconductor layers to expose a portion of the base semiconductor layer and then, growing semiconductor on the exposed portion of the base layer. The top one of the semiconductor layers is the layer of the sequence that is located farthest from the substrate. The growing causes grown semiconductor to laterally surround a vertical portion of the top one of the semiconductor layers.

    摘要翻译: 制造双极晶体管的方法包括在基板上形成集电极,基极和发射极半导体层,使得这些层相对于基板的相邻表面形成垂直的顺序。 该方法包括蚀刻远离半导体层顶部的一部分以露出基底半导体层的一部分,然后在基底层的暴露部分上生长半导体。 半导体层中的顶部之一是距离衬底最远的序列层。 生长的原因使半导体横向围绕半导体层顶部的垂直部分。

    Method of making an article comprising an oxide layer on a GaAs-based semiconductor body
    19.
    发明授权
    Method of making an article comprising an oxide layer on a GaAs-based semiconductor body 失效
    在GaAs基半导体本体上制造包含氧化物层的制品的方法

    公开(公告)号:US06271069B1

    公开(公告)日:2001-08-07

    申请号:US09122558

    申请日:1998-07-24

    IPC分类号: H01L2976

    摘要: Disclosed are a method of making GaAs-based enhancement-type MOS-FETs, and articles (e.g., GaAs-based ICs) that comprise such a MOS-FET. The MOS-FETs are planar devices, without etched recess or epitaxial re-growth, with gate oxide that is primarily Ga2O3, and with low midgap interface state density (e.g., at most 1×1011 cm−2 eV−1 at 20° C.). The method involves ion implantation, implant activation in an As-containing atmosphere, surface reconstruction, and in situ deposition of the gate oxide. In preferred embodiments, no processing step subsequent to gate oxide formation is carried out above 300° C. in air, or above about 700° C. in UHV. The method makes possible fabrication of planar enhancement-type MOS-FETs having excellent characteristics, and also makes possible fabrication of complementary MOS-FETs, as well as ICs comprising MOS-FETs and MES-FETs. The method includes deposition of gate oxide of overall composition GaxAyOz, where Ga substantially is in the 3+ oxidation state, A is one or more electropositive stabilizer element adapted for stabilizing Ga in the 3+ oxidation state, x is greater than or equal to zero, z is selected to satisfy the requirement that both Ga and A are substantially fully oxidized, and y/(x+y) is greater than 0.1.

    摘要翻译: 公开了制造基于GaAs的增强型MOS-FET的方法以及包括这种MOS-FET的制品(例如,基于GaAs的IC)。 MOS-FET是没有蚀刻凹槽或外延再生长的平面器件,其栅极氧化物主要是Ga 2 O 3,并且具有低的中间隙界面态密度(例如,在20℃下至多为1×10 11 cm -2 eV-1) 。 该方法涉及离子注入,在含As气氛中的注入活化,表面重构和栅极氧化物的原位沉积。 在优选的实施方案中,栅极氧化物形成之后的处理步骤在高于300℃的空气中或在高于约700℃的UHV中进行。 该方法可以制造具有优异特性的平面增强型MOS-FET,并且还可以制造互补MOS-FET以及包括MOS-FET和MES-FET的IC。 该方法包括沉积总体组成为GaxAyOz的栅极氧化物,其中Ga基本上处于3+氧化态,A是一种或多种适用于稳定3+氧化态的Ga的正电荷稳定剂元素,x大于或等于零 选择z以满足Ga和A基本上完全氧化,y /(x + y)大于0.1的要求。

    Method and apparatus for enhancing transmitter circuit efficiency of mobile radio units by selectable switching of power amplifier
    20.
    发明授权
    Method and apparatus for enhancing transmitter circuit efficiency of mobile radio units by selectable switching of power amplifier 失效
    通过功率放大器的可选择切换来增强移动无线电单元的发射机电路效率的方法和装置

    公开(公告)号:US06208846B1

    公开(公告)日:2001-03-27

    申请号:US08782355

    申请日:1997-01-13

    IPC分类号: H04B104

    摘要: A circuit that increases the efficiency of a radio frequency mobile telephone unit is disclosed. When the signal strength between the base station and the mobile unit is below a predetermined signal strength level, the power amplifier is turned on and the transmitter circuit of the mobile unit fully amplifies the RF signal. However, when the signal strength between the mobile telephone unit and the base station is above a predetermined signal strength level, the power amplifier is deactivated and bypassed from the transmitter circuitry, thereby conserving the battery power of the mobile unit.

    摘要翻译: 公开了一种提高射频移动电话机的效率的电路。 当基站和移动单元之间的信号强度低于预定信号强度电平时,功率放大器导通,移动单元的发射机电路完全放大RF信号。 然而,当移动电话单元和基站之间的信号强度高于预定的信号强度水平时,功率放大器被去激活并从发射机电路旁路,从而节省了移动单元的电池功率。