Over-sampling digital-to-analog converter with variable sampling frequencies
    12.
    发明授权
    Over-sampling digital-to-analog converter with variable sampling frequencies 有权
    具有可变采样频率的过采样数模转换器

    公开(公告)号:US06911927B2

    公开(公告)日:2005-06-28

    申请号:US10310323

    申请日:2002-12-05

    IPC分类号: H03M3/00

    CPC分类号: H03M3/50

    摘要: The present invention offers an over-sampling digital-to-analog converter with variable sampling frequencies to process input signals of variable sampling frequencies. The over-sampling digital-to-analog converter comprises an expander, which expands said input signals with a fixed rate of M to produce over-sampling signals; a digital low-pass filter, which filters out high-frequency ingredients of over-sampling signals and then outputs data with a first rate; a data buffer, which receives the outputted data by said digital low-pass filter with the first rate and outputs the data with a second rate; a modulator, which reads data in said data buffer with the second rate and modulates the data; a digital-to-analog converter, which converts the modulated data to analog signals; and an analog low-pass filter, which filters out high-frequency ingredients of said analog signals for producing output signals. No matter how the sampling frequency of the input signals is, due to reading rates of the modulator are the same, the over-sampling digital-to-analog converter ensures that noise is mostly distributed in the high-frequency band.

    摘要翻译: 本发明提供具有可变采样频率的过采样数模转换器来处理可变采样频率的输入信号。 过采样数模转换器包括扩展器,其以固定速率M扩展所述输入信号以产生过采样信号; 数字低通滤波器,滤除过采样信号的高频成分,然后以第一速率输出数据; 数据缓冲器,其以所述第一速率由所述数字低通滤波器接收输出的数据,并以第二速率输出数据; 调制器,以第二速率读取所述数据缓冲器中的数据并调制数据; 数模转换器,其将调制数据转换为模拟信号; 以及模拟低通滤波器,其滤除所述模拟信号的高频成分以产生输出信号。 无论输入信号的采样频率如何,由于调制器的读取速率相同,过采样数模转换器可确保噪声主要分布在高频段。

    Variable gain amplifier
    15.
    发明授权
    Variable gain amplifier 有权
    可变增益放大器

    公开(公告)号:US07068107B2

    公开(公告)日:2006-06-27

    申请号:US10805297

    申请日:2004-03-22

    IPC分类号: H03F3/30

    CPC分类号: H03G1/0088

    摘要: The variable gain amplifier of the present invention includes at least an operation amplifier. By choosing one of output stages, a feedback resistor is selected and the gain of the variable gain amplifier is decided according to the resistance of the selected feedback resistor, as desired. By adjusting the gain of the variable gain amplifier, the received signals can be amplified or attenuated in accordance with design requirement. The variable gain amplifier can include a two-stage architecture, in which a first stage is used for coarse gain adjustment and a second stage is used for fine gain adjustment. The gain of the two-stage variable gain amplifier can be easily adjusted to a desired value.

    摘要翻译: 本发明的可变增益放大器至少包括一个运算放大器。 通过选择输出级之一,根据需要选择反馈电阻,并根据所选反馈电阻的电阻决定可变增益放大器的增益。 通过调整可变增益放大器的增益,接收信号可以根据设计要求进行放大或衰减。 可变增益放大器可以包括两级架构,其中第一级用于粗增益调整,第二级用于精细增益调整。 两级可变增益放大器的增益可以很容易地调整到所需的值。

    Ratio meter of a thermal sensor
    16.
    发明授权
    Ratio meter of a thermal sensor 有权
    热传感器的比率计

    公开(公告)号:US09039278B2

    公开(公告)日:2015-05-26

    申请号:US13754151

    申请日:2013-01-30

    摘要: A ratio meter includes a converter circuit, a first counter, a delay circuit, and a second counter. The converter circuit is configured to receive a temperature-independent signal, to convert the received temperature-independent signal into a first frequency signal during a first phase, to receive a temperature-dependent signal, and to convert the temperature-dependent signal into a second frequency signal during a second phase. The first counter is configured to receive the first frequency signal and to generate a control signal by counting a predetermined number of pulses of the first frequency signal count. The delay circuit is configured to delay the control signal for a predetermined time delay. The second counter is configured to receive the second frequency signal and to generate a count value by counting the second frequency signal.

    摘要翻译: 比率计包括转换器电路,第一计数器,延迟电路和第二计数器。 转换器电路被配置为接收温度独立信号,以在第一阶段期间将接收到的与温度无关的信号转换为第一频率信号,以接收依赖于温度的信号,并将温度相关信号转换为第二频率信号 频率信号在第二阶段。 第一计数器被配置为接收第一频率信号并且通过对预定数量的第一频率信号计数的脉冲进行计数来产生控制信号。 延迟电路被配置为延迟控制信号达预定的时间延迟。 第二计数器被配置为接收第二频率信号并且通过对第二频率信号进行计数来产生计数值。

    MEMS vacuum level monitor in sealed package
    17.
    发明授权
    MEMS vacuum level monitor in sealed package 有权
    MEMS真空度监测仪在密封包装中

    公开(公告)号:US08887573B2

    公开(公告)日:2014-11-18

    申请号:US13401134

    申请日:2012-02-21

    IPC分类号: G01L11/00 G01L13/02

    摘要: A vacuum sensor for sensing vacuum in a sealed enclosure is provided. The sealed enclosure includes active MEMS devices desired to be maintained in vacuum conditions. The vacuum sensor includes a motion beam anchored to an internal surface in the sealed enclosure. A driving electrode is disposed beneath the motion beam and a bias is supplied to cause the motion beam to deflect through electromotive force. A sensing electrode is also provided and detects capacitance between the sensing electrode disposed on the internal surface, and the motion beam. Capacitance changes as the gap between the motion beam and the sensing electrode changes. The amount of deflection is determined by the vacuum level in the sealed enclosure. The vacuum level in the sealed enclosure is thereby sensed by the sensing electrode.

    摘要翻译: 提供了用于感测密封外壳中的真空的真空传感器。 密封的外壳包括希望保持在真空条件下的有源MEMS器件。 真空传感器包括锚定在密封外壳中的内表面的运动梁。 驱动电极设置在运动光束下方,并且提供偏压以使运动光束通过电动势偏转。 还提供感测电极并且检测设置在内表面上的感测电极与运动光束之间的电容。 电容随着运动光束与感应电极之间的间隙而变化。 偏转量由密封外壳中的真空度决定。 因此,密封外壳中的真空度由感测电极感测。

    Buffer offset modulation
    18.
    发明授权
    Buffer offset modulation 有权
    缓冲偏移调制

    公开(公告)号:US08547259B1

    公开(公告)日:2013-10-01

    申请号:US13562509

    申请日:2012-07-31

    IPC分类号: H03M1/06

    摘要: One or more techniques for buffer offset modulation or buffer offset cancelling are provided herein. In an embodiment, an output for a sigma-delta analog digital converter (ADC) is provided using an output of a first chop-able buffer (FB) and an output of a second chop-able buffer (SB). For example, the output of the FB is associated with a first offset, the output of the SB is associated with a second offset, and the output of the ADC includes an ADC offset associated with the first offset and the second offset. In an embodiment, buffer offset modulation is provided by modulating the ADC offset using an offset rotation. In an example, the offset rotation is based at least in part on a reference clock and the output of the ADC. The buffer offset modulation mitigates the first offset or the second offset, where such offsets are generally undesired.

    摘要翻译: 本文提供了一种或多种用于缓冲器偏移调制或缓冲器偏移消除的技术。 在一个实施例中,使用第一斩波缓冲器(FB)的输出和第二可斩波缓冲器(SB)的输出来提供用于Σ-Δ模拟数字转换器(ADC)的输出。 例如,FB的输出与第一偏移相关联,SB的输出与第二偏移相关联,并且ADC的输出包括与第一偏移和第二偏移相关联的ADC偏移。 在一个实施例中,通过使用偏移旋转调制ADC偏移来提供缓冲器偏移调制。 在一个例子中,偏移旋转至少部分地基于参考时钟和ADC的输出。 缓冲器偏移调制减轻了第一偏移或第二偏移,其中这种偏移通常是不期望的。

    Audio processing system for use in multi-channel audio chip
    19.
    发明授权
    Audio processing system for use in multi-channel audio chip 有权
    音频处理系统用于多声道音频芯片

    公开(公告)号:US07496417B2

    公开(公告)日:2009-02-24

    申请号:US10734257

    申请日:2003-12-15

    IPC分类号: G06F17/00

    CPC分类号: H04S3/00

    摘要: An audio processing system for used in a multi-channel audio chip includes a multiplexer, a digital-to-analog converter, a de-multiplexer, a controller and N sample-and-hold circuits. The multiplexer receives N digital signals and outputs the digital signals one by one in a time-division manner. The digital-to-analog converter receives the digital signals from the multiplexer and converts them into corresponding N analog signals. The de-multiplexer outputs the analog signals one by one in a time-division manner. The controller generates control signals to control the selection of the multiplexer and the de-multiplexer. The sample-and-hold circuits hold the analog signals for a predetermined period of time and then outputs the signals, respectively.

    摘要翻译: 用于多声道音频芯片的音频处理系统包括多路复用器,数模转换器,去多路复用器,控制器和N个采样和保持电路。 多路复用器接收N个数字信号并以时分方式逐个输出数字信号。 数模转换器从多路复用器接收数字信号并将其转换成相应的N个模拟信号。 解复用器以时分方式逐个输出模拟信号。 控制器产生控制信号以控制多路复用器和解复用器的选择。 采样保持电路将模拟信号保持预定的时间段,然后分别输出信号。

    Amplifier circuit
    20.
    发明授权
    Amplifier circuit 有权
    放大器电路

    公开(公告)号:US07138869B2

    公开(公告)日:2006-11-21

    申请号:US10748667

    申请日:2003-12-31

    IPC分类号: H03G3/12

    CPC分类号: H03H11/126 H03H7/24

    摘要: An amplifier circuit having a high time constant. An operational amplifier includes a non-converting input terminal coupled to a ground, a converting input terminal and an output terminal. A first resistor network including at least one stage is coupled between the converting input terminal and the output terminal. Each stage of the first resistor network includes a first node, a first current path and a second current path connected to the first node. The first current path of each stage of the first resistor network is connected to the first node of the next stage, the second current path of each stage of the first resistor network is grounded, and the first current path of the first stage of the first resistor network is connected to the converting input terminal. A loading unit is coupled between the converting input terminal and the output terminal.

    摘要翻译: 具有高时间常数的放大器电路。 运算放大器包括耦合到地的非转换输入端,转换输入端和输出端。 包括至少一个级的第一电阻网络耦合在转换输入端和输出端之间。 第一电阻网络的每个级包括连接到第一节点的第一节点,第一电流路径和第二电流路径。 第一电阻网络的每个级的第一电流路径连接到下一级的第一节点,第一电阻网络的每一级的第二电流路径接地,并且第一电阻网络的第一级的第一电流路径 电阻网络连接到转换输入端。 加载单元耦合在转换输入端和输出端之间。