Connection unit, a board for mounting a device under test, a probe card and a device interfacing part
    11.
    发明授权
    Connection unit, a board for mounting a device under test, a probe card and a device interfacing part 有权
    连接单元,用于安装被测设备的板,探针卡和设备接口部分

    公开(公告)号:US07791360B2

    公开(公告)日:2010-09-07

    申请号:US12378856

    申请日:2009-02-20

    Abstract: A connection unit for electrically connecting a DUT mounting board, on which an IC socket is mounted, with a testing apparatus for testing an electronic device inserted into the IC socket, the connection unit has a holding substrate provided to face the DUT mounting board and a connection-unit-side connector, which is provided on the holding substrate to be able to change a position of the connection-unit-side connector on the holding substrate, for being connected to a performance-board-side connector included in the DUT mounting board.

    Abstract translation: 一种连接单元,用于将安装有IC插座的DUT安装板电连接到用于测试插入到IC插座中的电子设备的测试装置,连接单元具有设置成面向DUT安装板的保持基板和 连接单元侧连接器,其设置在保持基板上,以能够改变保持基板上的连接单元侧连接器的位置,以连接到包括在DUT安装件中的性能板侧连接器 板。

    Scanning electron microscope with length measurement function and dimension length measurement method
    12.
    发明授权
    Scanning electron microscope with length measurement function and dimension length measurement method 有权
    扫描电子显微镜具有长度测量功能和尺寸长度测量方法

    公开(公告)号:US07791022B2

    公开(公告)日:2010-09-07

    申请号:US11821028

    申请日:2007-06-21

    Abstract: A scanning electron microscope with a length measurement function includes an electron gun for emitting an electron beam, a measurement target region setting unit for setting a measurement region for a pattern formed on a sample, a storing unit for storing the designated measurement region, a beam blanker unit for controlling an irradiation of the electron beam depending on the measurement region, and a control unit for extracting the designated measurement region from the storing unit, interrupting the electron beam with the beam blanker unit in a region other than the measurement region, irradiating the electron beam onto the sample in the measurement region, capturing an image of the measurement region, and measuring the pattern. The measurement region may be a pair of regions having the same areas as each other.

    Abstract translation: 具有长度测量功能的扫描电子显微镜包括用于发射电子束的电子枪,用于设置在样品上形成的图案的测量区域的测量对象区域设置单元,用于存储指定测量区域的存储单元, 用于根据测量区域控制电子束的照射的消除器单元,以及用于从存储单元提取指定的测量区域的控制单元,在除了测量区域之外的区域中用光束消除单元中断电子束,照射 电子束在测量区域中的样品上,捕获测量区域的图像,并测量图案。 测量区域可以是具有彼此相同面积的一对区域。

    Single balanced mixer
    13.
    发明授权
    Single balanced mixer 失效
    单平衡搅拌机

    公开(公告)号:US07577416B2

    公开(公告)日:2009-08-18

    申请号:US09756442

    申请日:2001-01-08

    Abstract: A single balanced mixer has a high degree of isolation between an IF signal and an RF signal and a high conversion efficiency. The single balanced mixer includes means for producing two local signals of same amplitude and opposite phase, a pair of mixing elements each receiving a corresponding one of the two local signals, a pair of strip lines for transmitting the input RF signal to the mixing elements. One end of each of the strip lines is connected to one another at a point where the RF signal is supplied and other end of each of the strip lines is connected to the corresponding mixing element. A length of each of the strip lines is one fourth of a wave length of the IF signal.

    Abstract translation: 单个平衡混频器在IF信号和RF信号之间具有高度的隔离度和高转换效率。 单个平衡混频器包括用于产生相同振幅和相反相位的两个本地信号的装置,一对混合元件,每个混合元件接收两个本地信号中的相应一个;一对带状线,用于将输入RF信号传输到混合元件。 每个带状线的一端在提供RF信号的点处彼此连接,并且每条带状线的另一端连接到相应的混合元件。 每条带状线的长度是IF信号的波长的四分之一。

    Electron-beam size measuring apparatus and size measuring method with electron beams
    14.
    发明授权
    Electron-beam size measuring apparatus and size measuring method with electron beams 有权
    电子束尺寸测量装置和电子束尺寸测量方法

    公开(公告)号:US07560693B2

    公开(公告)日:2009-07-14

    申请号:US11820358

    申请日:2007-06-19

    Abstract: An electron-beam size measuring apparatus includes: electron beam irradiating means that irradiates an electron beam on a surface of a sample; detection means that detects electrons emitted from the sample; distance measurement means that measures the distance between the sample and a secondary electron control electrode of the detection means; a stage on which the sample is mounted; and control means which adjusts the height of the stage so that the distance measured by the distance measurement means would be equal to a predetermined fixed distance, which applies a control voltage to the secondary electron control electrode of the detection means, the control voltage predetermined so as to allow the sample surface potential to become constant with the sample positioned at the fixed distance, and which causes the electron beam to be irradiated by applying a predetermined accelerating voltage. The stage may include holding means that does not electrically connect the sample thereto, and moving means that moves the sample up and down.

    Abstract translation: 电子束尺寸测量装置包括:电子束照射装置,其在样品的表面上照射电子束; 检测装置,其检测从样品发射的电子; 距离测量装置,用于测量检测装置的样品与二次电子控制电极之间的距离; 安装样品的阶段; 以及控制装置,其调节台的高度,使得由距离测量装置测量的距离将等于预定的固定距离,其将控制电压施加到检测装置的二次电子控制电极,预定的控制电压 为了使样品表面电位变得恒定,样品位于固定距离处,并且通过施加预定的加速电压使得电子束被照射。 舞台可以包括不将样本电连接的保持装置和使样本上下移动的移动装置。

    Target value search circuit, taget value search method, and semiconductor test device using the same
    16.
    发明授权
    Target value search circuit, taget value search method, and semiconductor test device using the same 失效
    目标值搜索电路,标签值检索方法以及使用其的半导体测试装置

    公开(公告)号:US07444576B2

    公开(公告)日:2008-10-28

    申请号:US10532367

    申请日:2003-10-24

    Inventor: Hideyuki Oshima

    Abstract: In a tentative target value calculation section 28, a predetermined value is subtracted from (or added to) a target value Exp to calculate a tentative target value ExpB. In a binary search executing section 25, binary search is executed, and a searching region is limited to a certain region including this tentative target value ExpB. Next, in a sequential search executing section 29, the target value Exp is searched for in an increasing direction from the tentative target value ExpB which is a start point in the limited searching region. Accordingly, both drop prevention of measurement precision and reduction of searching time are achieved consistently, and a target value is securely and normally found in a case where a sequence constituting a searching object indicates an ascending-order sequence including a decrease in a part.

    Abstract translation: 在暂定目标值计算部28中,从目标值Exp中减去预定值(或相加)来计算暂定目标值ExpB。 在二进制搜索执行部分25中,执行二进制搜索,并且搜索区域被限制到包括该暂定目标值ExpB的某个区域。 接下来,在顺序搜索执行部分29中,从作为限制搜索区域中的开始点的暂定目标值ExpB,在增加方向上搜索目标值Exp。 因此,一致地实现了测量精度的下降防止和搜索时间的减少,并且在构成搜索对象的序列指示包括部分减少的升序序列的情况下,确实地和正常地发现目标值。

    Flat portions of a probe card flattened to have same vertical level with one another by compensating the unevenness of a substrate and each identical height needle being mounted on the corresponding flat portion through an adhesive
    17.
    发明授权
    Flat portions of a probe card flattened to have same vertical level with one another by compensating the unevenness of a substrate and each identical height needle being mounted on the corresponding flat portion through an adhesive 失效
    探针卡的平坦部分通过补偿基底的不均匀性而平坦化,具有相同的垂直度,并且每个相同的高度针通过粘合剂安装在相应的平坦部分上

    公开(公告)号:US07394265B2

    公开(公告)日:2008-07-01

    申请号:US10502365

    申请日:2003-01-24

    Applicant: Akio Kojima

    Inventor: Akio Kojima

    CPC classification number: G01R1/07342 G01R1/07307 Y10T29/49155 Y10T29/49165

    Abstract: A probe card on which micro probe needles are arranged at high density and with high precision without need of a complicated structure or variation in needle height. A probe card 1 installed in a wafer tester includes a board 2 having a wiring pattern for transmitting a test signal to be impressed on a wafer under test, a built-up board 10 formed on the surface of the board 2, a comb-shaped silicon-made probe needle 20 arranged on the built-up board 10 and connected to the surface wiring pattern 11, and a flat portion 12 formed by plating on the surface wiring pattern 11 on the built-up board 10 and having a surface flattened by polishing. The probe needle 20 is loaded on the flat portion 12 and thus mounted on the board 2.

    Abstract translation: 探针卡,其上以高密度和高精度布置微探针,而不需要复杂的结构或针头高度的变化。 安装在晶片测试器中的探针卡1包括具有用于传送待测试晶片上的测试信号的布线图案的板2,形成在板2的表面上的组合板10,梳状 布置在叠层板10上并连接到表面布线图案11的硅制探针20以及通过电镀在积层板10上的表面布线图案11上而形成的平坦部12,其平坦化表面 抛光。 探针20被装载在平坦部分12上,从而安装在板2上。

    Electron-beam exposure system
    18.
    发明授权
    Electron-beam exposure system 有权
    电子束曝光系统

    公开(公告)号:US07375356B2

    公开(公告)日:2008-05-20

    申请号:US11472228

    申请日:2006-06-21

    Inventor: Masaki Kurokawa

    Abstract: An electron-beam exposure system includes: density-per-area map generating means configured to divide a certain area on which an electron beam is irradiated into meshes, to figure out a ratio of an area of patterns to be irradiated on each divided region to an area of the divided region, thus to generate a density-per-area map; and proximity-effect correcting means configured to correct exposure of the electron beam by referring to the density-per-area map. The proximity-effect correcting means includes: product-sum arithmetic means which is configured to perform product-sum arithmetic on two-dimensional array data, and addition means which is configured to perform addition arithmetic on the two-dimensional array data; stores, in a first memory, two-dimensional array data on the density per area of the patterns; performs the product-sum arithmetic and the addition a predetermined number of times, and thus calculates the two-dimensional array data on the density per area by a linear conversion; and uses the resultant data as two-dimensional array data on exposure to be used for correcting a proximity effect.

    Abstract translation: 电子束曝光系统包括:密度每区域图生成装置,被配置为将电子束照射到其中的特定区域划分成网格,以便计算出要在每个分割区域上照射的图案的面积的比率 分割区域的区域,从而产生每区域密度图; 以及接近效应校正装置,被配置为通过参考每个区域密度图来校正电子束的曝光。 邻近效果校正装置包括:乘积和运算装置,被配置为对二维阵列数据执行乘积和运算;以及加法装置,被配置为对二维阵列数据执行加法运算; 在第一存储器中存储关于图案的每个区域的密度的二维阵列数据; 执行乘积和运算和相加预定次数,从而通过线性转换来计算每个面积密度的二维阵列数据; 并将所得到的数据作为用于校正接近效应的曝光时的二维阵列数据。

    Semiconductor test apparatus
    19.
    发明授权
    Semiconductor test apparatus 有权
    半导体测试仪

    公开(公告)号:US07332926B2

    公开(公告)日:2008-02-19

    申请号:US11486825

    申请日:2006-07-14

    CPC classification number: G01R31/31937 G01R31/3191 G01R31/31922

    Abstract: Good device PASS/FAIL determination is realized by measuring timings of a cross point of differential clock signals CLK and a data signal DATA output from a DUT, and obtaining a relative phase difference between both signals. A semiconductor test apparatus comprises differential signal timing measurement means for outputting cross point information Tcross obtained by a timing of a cross point of one of differential signals, non-differential signal timing measurement means for outputting data change point information Tdata obtained by a timing of transition of a logic of the other non-differential signal output, phase difference calculation means for outputting a phase difference ΔT between the cross point information Tcross and the data change point information Tdata, and PASS/FAIL determination means for determining PASS/FAIL of a relative positional relationship of the DUT based on a predetermined threshold value.

    Abstract translation: 通过测量差分时钟信号CLK的交叉点和从DUT输出的数据信号DATA的定时,并获得两个信号之间的相对相位差来实现良好的设备PASS / FAIL确定。 半导体测试装置包括差分信号定时测量装置,用于输出由差分信号之一的交叉点的定时获得的交叉点信息Tcross,非差分信号定时测量装置,用于输出由转换定时获得的数据变化点信息Tdata 输出其他非差分信号输出的逻辑的相位差计算装置,用于输出交叉点信息Tcross与数据变化点信息Tdata之间的相位差DeltaT,以及PASS / FAIL判断装置,用于确定相对位置的PASS / FAIL 基于预定阈值的DUT的位置关系。

    Impedance matching circuit, input-output circuit and semiconductor test apparatus
    20.
    发明授权
    Impedance matching circuit, input-output circuit and semiconductor test apparatus 失效
    阻抗匹配电路,输入输出电路和半导体测试装置

    公开(公告)号:US07317336B2

    公开(公告)日:2008-01-08

    申请号:US11326182

    申请日:2006-01-05

    Applicant: Shoji Kojima

    Inventor: Shoji Kojima

    CPC classification number: H04L25/0278

    Abstract: A characteristic test of a DUT having a low transmission line driving capability can be performed with a simple configuration and low cost. An impedance matching circuit is connected between a transmission line and a DUT in an input-output circuit of a semiconductor test apparatus. The impedance matching circuit includes: a resistance; an analog computing unit which multiplies a voltage from one end of the resistance by a predetermined number, subtracts a voltage from the other end of the resistance from the voltage multiplied by the predetermined number and outputs a resultant voltage; and a buffer which outputs a signal from the analog computing unit with low impedance. The impedance matching circuit produces an output signal from the DUT with low impedance, thereby sufficiently driving the transmission line.

    Abstract translation: 具有低传输线驱动能力的DUT的特性测试可以以简单的结构和低成本进行。 阻抗匹配电路连接在半导体测试装置的输入 - 输出电路中的传输线和DUT之间。 阻抗匹配电路包括:电阻; 将来自电阻的一端的电压乘以预定数量的模拟计算单元,从电压乘以预定数量的电阻的另一端减去电压,并输出合成电压; 以及缓冲器,其输出来自具有低阻抗的模拟计算单元的信号。 阻抗匹配电路从DUT产生低阻抗的输出信号,从而充分驱动传输线。

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