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11.发明授权公开(公告)号：US09966968B2
公开(公告)日：2018-05-08
申请号：US15783107
申请日：2017-10-13
申请人： MaxLinear, Inc.
发明人： Raja Pullela , Curtis Ling
摘要： Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logic modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.
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12.发明申请公开(公告)号：US20180054211A1
公开(公告)日：2018-02-22
申请号：US15783107
申请日：2017-10-13
申请人： MaxLinear, Inc.
发明人： Raja Pullela , Curtis Ling
摘要： Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logic modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.
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13.发明授权公开(公告)号：US09793915B2
公开(公告)日：2017-10-17
申请号：US15238056
申请日：2016-08-16
申请人： MaxLinear, Inc.
发明人： Raja Pullela , Curtis Ling
摘要： Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logic modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.
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14.发明申请公开(公告)号：US20160365869A1
公开(公告)日：2016-12-15
申请号：US15238056
申请日：2016-08-16
申请人： MaxLinear, Inc.
发明人： Raja Pullela , Curtis Ling
IPC分类号： H03M1/38
摘要： Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logice modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.
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15.发明授权公开(公告)号：US09444485B2
公开(公告)日：2016-09-13
申请号：US14811139
申请日：2015-07-28
申请人： MaxLinear, Inc.
发明人： Raja Pullela , Curtis Ling
摘要： Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logic modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.
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公开(公告)号：US20150091744A1
公开(公告)日：2015-04-02
申请号：US14043284
申请日：2013-10-01
申请人： Junhua SHEN , Ronald A. KAPUSTA
发明人： Junhua SHEN , Ronald A. KAPUSTA
CPC分类号： H03M1/0854 , H03M1/04 , H03M1/0697 , H03M1/46 , H03M1/462
摘要： Embodiments of the present invention may provide accuracy enhancement techniques to improve ADC SNRs. For example, regular bit trials from a most significant bit (MSB) to predetermined less significant bit of a digital word and extra bit trials may be performed. The results of the regular and extra bit trials may be combined to generate a digital output signal. A residue error may be measured, and the digital output signal may be adjusted based on the measured residue error.
摘要翻译： 本发明的实施例可以提供精度增强技术来提高ADC SNR。 例如，可以执行从最高有效位（MSB）到数字字的预定的较低有效位和额外的位试验的规则位测试。 常规和额外的比特试验的结果可以组合以产生数字输出信号。 可以测量残留误差，并且可以基于测量的残余误差来调整数字输出信号。
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17.发明申请SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER (ADC) WITH DYNAMIC SEARCH ALGORITHM 有权具有动态搜索算法的连续逼近模数转换器（ADC）公开(公告)号：US20150084795A1
公开(公告)日：2015-03-26
申请号：US14558004
申请日：2014-12-02
申请人： MaxLinear, Inc.
发明人： Raja Pullela , Curtis Ling
摘要： Aspects of a method and system for a successive approximation analog-to-digital converter with dynamic search algorithms are provided. In some embodiments, a successive approximation analog-to-digital converter includes a digital-to-analog converter, a comparator, and a search and decode logice modules which cooperate to generate a digital output code representative of the analog input voltage based on a dynamic search algorithm. The dynamic search algorithms may alter a sequence of reference voltages used to successively approximate the analog input voltage based on one or more characteristics of the analog input voltage.
摘要翻译： 提供了具有动态搜索算法的逐次逼近模数转换器的方法和系统的方面。 在一些实施例中，逐次逼近模数转换器包括数模转换器，比较器以及搜索和解码逻辑模块，其协作以基于动态的方式生成代表模拟输入电压的数字输出代码 搜索算法。 动态搜索算法可以基于模拟输入电压的一个或多个特性改变用于连续逼近模拟输入电压的参考电压序列。
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公开(公告)号：US08810440B2
公开(公告)日：2014-08-19
申请号：US13983297
申请日：2012-05-29
申请人： Jianhui Wu , Zixuan Wang , Xiao Shi , Meng Zhang , Cheng Huang , Chao Chen , Fuqing Huang , Xincun Ji , Ping Jiang
发明人： Jianhui Wu , Zixuan Wang , Xiao Shi , Meng Zhang , Cheng Huang , Chao Chen , Fuqing Huang , Xincun Ji , Ping Jiang
CPC分类号： H03M1/04 , G04F10/005
摘要： A stochastic time-digital converter (STDC) including an input switching circuit, an STDC array, and an encoder. A clock circuit inputs two clock signals into two input terminals of the input switching circuit; the input switching circuit transmits the two clock signals in a cyclic cross-transposition form to two input terminals of the STDC array, and simultaneously outputs a trigger control signal to the encoder; each comparator in the STDC array independently judges the speeds of the two clock signals and sends the judgement results to the encoder for collection and processing; and the encoder outputs the size and positivity or negativity of the phase difference of the two clock signals. The technical solution utilizes the stochastic characteristic of the STDC to double the number of the equivalent comparators in the STDC array, eliminating the effects on the circuitry of device mismatching and processes, power supply voltage, and temperature.
摘要翻译： 包括输入切换电路，STDC阵列和编码器的随机时间数字转换器（STDC）。 时钟电路将两个时钟信号输入到输入开关电路的两个输入端; 输入切换电路以循环交叉形式将两个时钟信号发送到STDC阵列的两个输入端，同时向编码器输出触发控制信号; STDC阵列中的每个比较器独立地判断两个时钟信号的速度，并将判断结果发送到编码器进行采集和处理; 并且编码器输出两个时钟信号的相位差的大小和积极性或消极性。 该技术解决方案利用STDC的随机特性将STDC阵列中的等效比较器的数量加倍，从而消除了器件不匹配和处理电路，电源电压和温度的影响。
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19.发明授权公开(公告)号：US08384578B2
公开(公告)日：2013-02-26
申请号：US13192056
申请日：2011-07-27
申请人： Bob Verbruggen , Jan Craninckx
发明人： Bob Verbruggen , Jan Craninckx
摘要： An analog-to-digital (A/D) converter circuit arranged for receiving an analog input signal and for outputting a digital representation of said analog input signal is described. The A/D converter circuit includes: a first converter stage configured for receiving the analog input signal and for generating a first set of conversion bits, a first completion signal and a residual analog output signal representing the difference between the analog input signal and a signal represented by said first set of conversion bits, a second converter stage comprising a clock generation circuit arranged for receiving the first completion signal and for generating a clock signal, a plurality of comparators each being configured for receiving the residual analog output signal and a common reference voltage, said plurality of comparators arranged for being activated by the clock signal and for outputting a plurality of comparator decisions, a digital processing stage configured for receiving the plurality of comparator decisions and for generating a second set of conversion bits, means for generating the digital representation of the analog input signal by combining the first and second set of conversion bits.
摘要翻译： 描述了用于接收模拟输入信号并输出所述模拟输入信号的数字表示的模拟（A / D）转换器电路。 A / D转换器电路包括：第一转换器级，被配置为接收模拟输入信号并产生第一组转换位，第一完成信号和表示模拟输入信号与信号之间的差的残留模拟输出信号 由所述第一组转换位表示的第二转换器级，包括布置成用于接收第一完成信号并用于产生时钟信号的时钟产生电路，多个比较器被配置为用于接收残留模拟输出信号和公共参考 电压，所述多个比较器被布置成被时钟信号激活并用于输出多个比较器判定;数字处理级，被配置用于接收多个比较器判决并用于产生第二组转换位，用于产生数字 通过组合第一个a来表示模拟输入信号 第二组转换位。
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公开(公告)号：US20050270202A1
公开(公告)日：2005-12-08
申请号：US11021140
申请日：2004-12-24
申请人： Jacobus Haartsen
发明人： Jacobus Haartsen
摘要： A supplied analog signal is modulated by comparing the supplied analog signal with a noise signal. As a result of each comparison, an output signal is generated having a first value if the supplied analog signal is greater than the noise signal and generating an output signal having a second value if the supplied analog signal is lower than the noise signal. Such modulation is useful in applications such as analog-to-digital conversion. The transfer function of the modulator is a function of the distribution of the noise source.
摘要翻译： 通过将提供的模拟信号与噪声信号进行比较来调制所提供的模拟信号。 作为每个比较的结果，如果所提供的模拟信号大于噪声信号，则产生具有第一值的输出信号，并且如果所提供的模拟信号低于噪声信号，则产生具有第二值的输出信号。 这种调制在诸如模数转换的应用中是有用的。 调制器的传递函数是噪声源分布的函数。
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