公开(公告)号：US20080239685A1

公开(公告)日：2008-10-02

申请号：US12056640

申请日：2008-03-27

Applicant: Tadahiko Kawabe ,  Masao Kuroda

Inventor： Tadahiko Kawabe ,  Masao Kuroda

IPC: H05K7/06

CPC classification number: H05K3/4046 ,  H01G4/232 ,  H01G4/30 ,  H01G4/33 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01025 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/1461 ,  H01L2924/15312 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10712 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A wiring board is comprised of a core board, a capacitor, a conductor containing portion and a laminated wiring portion. The core board has an accommodation hole. The capacitor has a through hole therein and is accommodated in the accommodation hole. The conductor containing portion has a current supplying conductor and is disposed in the through hole so as to be surrounded by the capacitor. The laminated wiring portion includes a component mounting region in which a first connection terminal electrically connected to the current supplying conductor is provided. Further, second connection terminals are disposed so as to sandwich the first connection terminal therebetween.

Abstract translation: 布线板由芯板，电容器，导体容纳部和层叠布线部构成。 核心板有一个住宿孔。 电容器在其中具有通孔并容纳在容纳孔中。 导体容纳部分具有供电导体，并且设置在通孔中以被电容器包围。 叠层布线部分包括其中设置有电连接到电流导体的第一连接端子的部件安装区域。 此外，第二连接端子被设置成将第一连接端子夹在其间。

公开(公告)号：US20070045814A1

公开(公告)日：2007-03-01

申请号：US11508968

申请日：2006-08-24

Applicant: Hiroshi Yamamoto ,  Toshitake Seki ,  Shinji Yuri ,  Masaki Muramatsu ,  Motohiko Sato ,  Akifumi Tosa

Inventor： Hiroshi Yamamoto ,  Toshitake Seki ,  Shinji Yuri ,  Masaki Muramatsu ,  Motohiko Sato ,  Akifumi Tosa

IPC: H01L23/04

CPC classification number: H01L21/6835 ,  H01G4/236 ,  H01G4/30 ,  H01L21/568 ,  H01L23/49822 ,  H01L2221/68345 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30105 ,  H05K1/0231 ,  H05K1/112 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/096 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2224/05599

Abstract: A wiring board includes a substrate core and a ceramic chip to be embedded therein. The substrate core has a housing opening portion opening at a core main surface. The ceramic chip is accommodated in the housing opening portion so that the core main surface and a chip first main surface face the same way. The ceramic chip includes a plurality of second terminal electrodes comprised of a metallized layer and formed on the chip second main surface so as to protrude therefrom. A projecting portion, disposed on the second main surface side so as to surround a plurality of the second terminal electrodes, is formed on the chip second main surface so as to protrude therefrom.

Abstract translation: 布线基板包括嵌入其中的基板芯和陶瓷芯片。 基板芯具有在芯主表面处开口的壳体开口部。 陶瓷芯片容纳在壳体开口部分中，使得芯主表面和芯片第一主表面相同。 陶瓷芯片包括多个由金属化层构成的第二端子电极，并且形成在芯片第二主表面上以从其突出。 在芯片第二主表面上形成有从第二主表面侧配置成包围多个第二端子电极的突出部，从而突出。

公开(公告)号：US20060175083A1

公开(公告)日：2006-08-10

申请号：US11350285

申请日：2006-02-09

Applicant: Masaki Muramatsu ,  Shinji Yuri ,  Kazuhiro Urashima ,  Hiroshi Yamamoto ,  Toshitake Seki ,  Motohiko Sato

Inventor： Masaki Muramatsu ,  Shinji Yuri ,  Kazuhiro Urashima ,  Hiroshi Yamamoto ,  Toshitake Seki ,  Motohiko Sato

IPC: H05K1/16

CPC classification number: H01G2/06 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/10 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/0102 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An intermediate board has a board core formed by a main core body and a sub-core portion. The main core body has a plate-like shape and includes an open sub-core housing portion in which the sub-core portion is housed. A first terminal array of the board core has an area that overlaps an orthogonal projection of the sub-core portion. The latter incorporates a laminated ceramic capacitor formed by first and second conductor layers with a ceramic (dielectric) layer therebetween. The first layer is connected to first and second side terminals of a first type while the second layer is connected to first and second side terminals of a second type. The housing portion has an inner edge which, in cross section, is of a quadrate shape, and a radius portion is formed at each corner having a dimension of between 0.1 and 2 mm.

Abstract translation: 中间板具有由主芯体和副芯部形成的板芯。 主芯体具有板状形状，并且包括其中容纳有副芯部的开放子芯容纳部。 板芯的第一端子阵列具有与子芯部的正交突起重叠的区域。 后者包括由其间具有陶瓷（电介质）层的第一和第二导体层形成的层叠陶瓷电容器。 第一层连接到第一类型的第一和第二侧端子，而第二层连接到第二类型的第一和第二侧端子。 壳体部分具有横截面为正方形的内边缘，并且在每个拐角处形成具有0.1至2mm的尺寸的半径部分。

公开(公告)号：US20180242447A1

公开(公告)日：2018-08-23

申请号：US15961098

申请日：2018-04-24

Applicant: ALCATEL-LUCENT CANADA INC.

Inventor： James M. SCHRIEL ,  Alex L. CHAN ,  Paul J. BROWN

IPC: H05K1/02 ,  H05K1/18 ,  H05K1/11 ,  H05K3/00

CPC classification number: H05K1/0296 ,  H05K1/111 ,  H05K1/113 ,  H05K1/114 ,  H05K1/181 ,  H05K3/0005 ,  H05K2201/10704 ,  H05K2201/10712 ,  H05K2201/10719 ,  H05K2201/10734 ,  Y02P70/611

Abstract: Various exemplary embodiments relate to a printed circuit board (PCB) for electrically connecting a discrete array component including a pattern formed on the PCB which is a merger of a set of via pads and a discrete array component; wherein the pattern is generated by a pin mapping between the discrete array component and a via grid array on the PCB; and wherein the pattern is formed of a metal etched during a manufacturing process of the PCB.

公开(公告)号：US08304321B2

公开(公告)日：2012-11-06

申请号：US12951895

申请日：2010-11-22

Applicant: Motohiko Sato ,  Kazuhiro Hayashi ,  Kenji Murakami ,  Motonobu Kurahashi ,  Yusuke Kaieda ,  Jun Otsuka ,  Manabu Sato

Inventor： Motohiko Sato ,  Kazuhiro Hayashi ,  Kenji Murakami ,  Motonobu Kurahashi ,  Yusuke Kaieda ,  Jun Otsuka ,  Manabu Sato

IPC: H01L21/20

CPC classification number: H05K1/0231 ,  H01G4/228 ,  H01G4/30 ,  H01G4/38 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/3511 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10712 ,  H01L2924/00

Abstract: A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the different dielectric layers, wherein said capacitor body has, in at least one side face of said capacitor body, recesses extending in a thickness direction of said capacitor body from at least one of a first principal face of said capacitor body and a second principal face positioned on the side opposite to the first principal face.

Abstract translation: 一种电容器，其具有电容器，所述电容器包括：电容器主体，包括多个电介质层和设置在所述不同电介质层之间的内部电极层，其中所述电容器本体在所述电容器主体的至少一个侧面中， 从所述电容器主体的第一主面和位于与所述第一主面相反的一侧的第二主面中的至少一个在所述电容器本体的厚度方向上延伸的凹部。

公开(公告)号：US07973245B2

公开(公告)日：2011-07-05

申请号：US12026838

申请日：2008-02-06

Applicant: Masaki Muramatsu ,  Shinji Yuri ,  Kazuhiro Urashima ,  Hiroshi Yamamoto ,  Toshitake Seki ,  Motohiko Sato

Inventor： Masaki Muramatsu ,  Shinji Yuri ,  Kazuhiro Urashima ,  Hiroshi Yamamoto ,  Toshitake Seki ,  Motohiko Sato

IPC: H05K1/16

CPC classification number: H01G2/06 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L24/10 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/0102 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An intermediate board has a board core formed by a main core body and a sub-core portion. The main core body has a plate-like shape and includes an open sub-core housing portion in which the sub-core portion is housed. A first terminal array of the board core has an area that overlaps an orthogonal projection of the sub-core portion. The latter incorporates a laminated ceramic capacitor formed by first and second conductor layers with a ceramic (dielectric) layer therebetween. The first layer is connected to first and second side terminals of a first type while the second layer is connected to first and second side terminals of a second type. The housing portion has an inner edge which, in cross section, is of a quadrate shape, and a radius portion is formed at each corner having a dimension of between 0.1 and 2 mm.

Abstract translation: 中间板具有由主芯体和副芯部形成的板芯。 主芯体具有板状形状，并且包括其中容纳有副芯部的开放子芯容纳部。 板芯的第一端子阵列具有与子芯部的正交突起重叠的区域。 后者包括由其间具有陶瓷（电介质）层的第一和第二导体层形成的层叠陶瓷电容器。 第一层连接到第一类型的第一和第二侧端子，而第二层连接到第二类型的第一和第二侧端子。 壳体部分具有横截面为正方形的内边缘，并且在每个角部处形成具有0.1至2mm的尺寸的半径部分。

公开(公告)号：US07956454B2

公开(公告)日：2011-06-07

申请号：US12475648

申请日：2009-06-01

Applicant: Hiroshi Yamamoto ,  Toshitake Seki ,  Shinji Yuri ,  Masaki Muramatsu ,  Motohiko Sato ,  Akifumi Tosa

Inventor： Hiroshi Yamamoto ,  Toshitake Seki ,  Shinji Yuri ,  Masaki Muramatsu ,  Motohiko Sato ,  Akifumi Tosa

IPC: H01L23/053

CPC classification number: H01L21/6835 ,  H01G4/236 ,  H01G4/30 ,  H01L21/568 ,  H01L23/49822 ,  H01L2221/68345 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30105 ,  H05K1/0231 ,  H05K1/112 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/096 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2224/05599

Abstract: A wiring board includes a substrate core and a ceramic chip to be embedded therein. The substrate core has a housing opening portion opening at a core main surface. The ceramic chip is accommodated in the housing opening portion so that the core main surface and a chip first main surface face the same way. The ceramic chip includes a plurality of second terminal electrodes comprised of a metallized layer and formed on the chip second main surface so as to protrude therefrom. A projecting portion, disposed on the second main surface side so as to surround a plurality of the second terminal electrodes, is formed on the chip second main surface so as to protrude therefrom.

Abstract translation: 布线基板包括嵌入其中的基板芯和陶瓷芯片。 基板芯具有在芯主表面处开口的壳体开口部。 陶瓷芯片容纳在壳体开口部分中，使得芯主表面和芯片第一主表面相同。 陶瓷芯片包括多个由金属化层构成的第二端子电极，并且形成在芯片第二主表面上以从其突出。 在芯片第二主表面上形成有从第二主表面侧配置成包围多个第二端子电极的突出部，从而突出。

公开(公告)号：US07894202B2

公开(公告)日：2011-02-22

申请号：US11836601

申请日：2007-08-09

Applicant: Hidetaka Fukudome ,  Masaaki Taniguchi

Inventor： Hidetaka Fukudome ,  Masaaki Taniguchi

IPC: H05K1/18

CPC classification number: H01G4/232 ,  H01G4/30 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2924/15313 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/185 ,  H05K2201/10712 ,  Y10T29/435

Abstract: A multilayer capacitor includes a laminate of ceramic layers, and a capacitor unit provided in the laminate. In the multilayer capacitor, the relationships P≧Ra and P≧W are established, wherein P represents the average projection height of first and second via conductors from the upper surface, Ra represents the surface roughness of the upper surface, and W represents an amount of curvature of the laminate. Further, the projecting portions of the first and second via conductors projecting from the upper surface are buried in first and second external electrodes, respectively.

Abstract translation: 多层电容器包括陶瓷层的层压体和设置在层叠体中的电容器单元。 在层叠电容器中，建立了P≥Ra和P≥W的关系，其中P表示第一和第二通孔导体从上表面的平均突出高度，Ra表示上表面的表面粗糙度，W表示 的层叠体的曲率。 此外，从上表面突出的第一和第二通孔导体的突出部分分别埋在第一和第二外部电极中。

公开(公告)号：US20100300740A1

公开(公告)日：2010-12-02

申请号：US12791303

申请日：2010-06-01

Applicant: Seiji Ichiyanagi ,  Kenji Murakami ,  Motohiko Sato ,  Jun Otsuka ,  Masahiko Okuyama

Inventor： Seiji Ichiyanagi ,  Kenji Murakami ,  Motohiko Sato ,  Jun Otsuka ,  Masahiko Okuyama

IPC: H05K1/16 ,  H01G4/06

CPC classification number: H05K1/0231 ,  H01G4/232 ,  H01G4/30 ,  H01G4/33 ,  H01L23/49822 ,  H01L23/50 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/09701 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10712 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A ceramic capacitor includes a capacitor body and a metal layer arranged on an outer surface of the capacitor body. The outer surface includes: a first capacitor major surface; a second capacitor major surface opposite to the first capacitor major surface in a thickness direction of the capacitor body; and a capacitor lateral surface between the first and second capacitor major surfaces. The capacitor body includes a first layer section and a second layer section. The first layer section includes a plurality of ceramic dielectric layers and a plurality of internal electrodes, wherein the ceramic dielectric layers and the internal electrodes are layered alternately. The second layer section is exposed at the first capacitor major surface, and includes a corner portion at a boundary between the first capacitor major surface and the capacitor lateral surface. The metal layer covers the corner portion of the second layer section.

Abstract translation: 陶瓷电容器包括电容器主体和布置在电容器主体的外表面上的金属层。 外表面包括：第一电容器主表面; 与电容器主体的厚度方向上的第一电容器主表面相反的第二电容器主表面; 以及在第一和第二电容器主表面之间的电容器横向表面。 电容器主体包括第一层部分和第二层部分。 第一层部分包括多个陶瓷电介质层和多个内部电极，其中陶瓷电介质层和内部电极交替层叠。 第二层部分在第一电容器主表面处露出，并且包括在第一电容器主表面和电容器侧表面之间的边界处的拐角部分。 金属层覆盖第二层部分的角部。

公开(公告)号：US07808799B2

公开(公告)日：2010-10-05

申请号：US11739752

申请日：2007-04-25

Applicant: Tadahiko Kawabe ,  Masao Kuroda ,  Yasuhiro Sugimoto ,  Hajime Saiki ,  Shinji Yuri ,  Makoto Origuchi

Inventor： Tadahiko Kawabe ,  Masao Kuroda ,  Yasuhiro Sugimoto ,  Hajime Saiki ,  Shinji Yuri ,  Makoto Origuchi

IPC: H05K1/16

CPC classification number: H05K1/185 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/642 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H05K1/0231 ,  H05K1/112 ,  H05K3/4602 ,  H05K2201/096 ,  H05K2201/10674 ,  H05K2201/10712 ,  H01L2224/05599

Abstract: A wiring board having an excellent electrical property and reliability or the like. The wiring board includes a core board, a capacitor and a resin filler. The core board includes an accommodation hole therein and a core board main surface side conductor disposed on the core main surface thereof. A capacitor main surface side electrode is disposed on a capacitor main surface of the capacitor. A gap between the capacitor accommodated in the accommodation hole and the core board is filled with the resin filler so that the capacitor is fixed to the core board. Further, the resin filler has a main surface side wiring forming portion on which a main surface side connecting conductor, which is connected to an end portion of a via conductor, is disposed so as to connect the core board main surface side conductor to the capacitor main surface side electrode.

Abstract translation: 具有优异的电性能和可靠性等的布线板。 布线板包括芯板，电容器和树脂填料。 芯板包括容纳孔和设置在其芯主表面上的芯板主表面侧导体。 电容器主面侧电极设置在电容器的电容器主表面上。 容纳在容纳孔中的电容器和芯板之间的间隙填充有树脂填料，使得电容器固定到芯板。 此外，树脂填料具有主表面侧布线形成部分，其上连接有通孔导体的端部的主表面侧连接导体，以将芯板主表面侧导体连接到电容器 主表面侧电极。