公开(公告)号：US20190267367A1

公开(公告)日：2019-08-29

申请号：US16406534

申请日：2019-05-08

Applicant: STMicroelectronics SA

Inventor： Johan BOURGEAT

IPC: H01L27/02 ,  H02H9/04 ,  H01L27/06

Abstract: An integrated circuit includes a power supply terminal, a reference terminal, and a signal terminal. A first protection device is coupled between the signal terminal and the power supply terminal, the first protection device including a first MOS transistor. A second protection device is coupled between the signal terminal and the reference terminal, the second protection device including a second MOS transistor. Gates of the MOS transistors are directly or indirectly coupled to the reference terminal. Substrates of the MOS transistors are coupled to the reference terminal via a common resistor.

公开(公告)号：US20190244857A1

公开(公告)日：2019-08-08

申请号：US16384147

申请日：2019-04-15

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Didier DUTARTRE ,  Jean-Pierre CARRERE ,  Jean-Luc HUGUENIN ,  Clement PRIBAT ,  Sarah KUSTER

IPC: H01L21/768 ,  H01L21/762 ,  H01L21/74 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/84 ,  H01L27/12

CPC classification number: H01L21/76877 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/743 ,  H01L21/7624 ,  H01L21/823475 ,  H01L21/84 ,  H01L27/1207 ,  H01L29/0649

Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.

公开(公告)号：US10374069B2

公开(公告)日：2019-08-06

申请号：US15840890

申请日：2017-12-13

Applicant: STMicroelectronics SA

Inventor： Pascal Chevalier

IPC: H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L21/308 ,  H01L29/732 ,  H01L29/737

Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening having sidewalls lined with an insulating sheath. A portion of the insulating sheath adjacent the base region is removed and a base contact region is formed by epitaxial material grown from a portion of the base region exposed by removal of the portion of the insulating sheath.

公开(公告)号：US10361657B2

公开(公告)日：2019-07-23

申请号：US15358350

申请日：2016-11-22

Applicant: STMicroelectronics SA

Inventor： Emmanuel Chataigner

IPC: H03B5/12

Abstract: An integrated circuit includes at least two identical, synchronous and independent oscillator circuits that are coupled one to one in parallel with each other at homologous oscillating nodes of the respective oscillator circuits. The coupling in parallel is made using at least one coupling track that is configured so as to not introduce any phase shift or to introduce a very small phase shift.

公开(公告)号：US20190181131A1

公开(公告)日：2019-06-13

申请号：US16216541

申请日：2018-12-11

Applicant: STMicroelectronics SA

Inventor： Philippe GALY ,  Louise DE CONTI

IPC: H01L27/02 ,  H02H9/04

Abstract: An electronic device for providing ESD protection is formed by a MOS transistor. the MOS transistor includes a source region and a drain region that are separated from each other by a channel-forming region. A first gate is located over the channel forming region. The drain region includes an extension region. A second gate is located over the extension region. The first and second gates are electrically connected to each other.

公开(公告)号：US20190164973A1

公开(公告)日：2019-05-30

申请号：US16199810

申请日：2018-11-26

Applicant: STMicroelectronics SA

Inventor： Hassan EL DIRANI ,  Thomas BEDECARRATS ,  Philippe GALY

IPC: H01L27/108 ,  G11C11/402 ,  G11C11/409

Abstract: A memory array includes memory cells of Z2-FET type arranged in rows and columns, wherein each memory cell includes a MOS-type selection transistor and a first region of a first conductivity type that is shared in common with a drain region of the first conductivity type of the selection transistors. The selection transistors of a same column of the memory array have a common drain region, a common source region, and a common channel region.

公开(公告)号：US10302693B2

公开(公告)日：2019-05-28

申请号：US15468798

申请日：2017-03-24

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Vincent Huard ,  Chittoor Parthasarathy

IPC: G01R31/28

Abstract: A system-on-a-chip includes an integrated circuit and an estimation circuit. The estimation circuit operates to acquire at least one physical parameter representative of the use of the integrated circuit and determine an instantaneous state of aging of the integrated circuit as a function of the at least one physical parameter. A margin of use of the integrated circuit is then calculated by comparing the instantaneous state of aging with a presumed state of aging.

公开(公告)号：US20190158069A1

公开(公告)日：2019-05-23

申请号：US16259689

申请日：2019-01-28

Applicant: STMicroelectronics SA

Inventor： Bruno GRELAUD ,  Sebastien PRUVOST

IPC: H03H11/28 ,  H04B1/04 ,  H04B3/26 ,  H03H11/24 ,  H04L25/02 ,  H04L25/12 ,  H03H7/25 ,  H01Q1/50 ,  H03H11/32 ,  H03H11/30 ,  H03H7/40 ,  H04B1/18

Abstract: An attenuator having an impedance that is controllable by a first setpoint signal is coupled to a transmission line. A matching circuit having an impedance that is controllable by a second setpoint signal is also coupled to the transmission line. A transformer circuit block also coupled to the transmission line has a complex impedance. A control circuit sets the first and second setpoint signals so as to control a conjugate impedance relationship between the variable impedances presented by the attenuator and matching circuit relative to the complex impedance of the transformer circuit.

公开(公告)号：US10298178B2

公开(公告)日：2019-05-21

申请号：US15945384

申请日：2018-04-04

Applicant: STMicroelectronics SA

Inventor： Laurent Chabert

IPC: H03F1/22 ,  H03F1/26 ,  H03F1/52 ,  H03F1/56 ,  H03F3/20 ,  H03F3/72 ,  H04B1/16 ,  H04B1/44 ,  H03F3/195

Abstract: A communication apparatus includes an antenna and a receive chain. The receive chain includes a switching transistor, and amplification transistor and a discharge transistor. The amplification transistor has a control terminal coupled to a current path terminal of the switching transistor. The discharge transistor has a current path coupled between the control terminal of the amplification transistor and a ground terminal. The discharge circuit is configured to discharge an intrinsic capacitance of the switching circuit when the switching transistor is in an off state.

公开(公告)号：US10268929B2

公开(公告)日：2019-04-23

申请号：US15381919

申请日：2016-12-16

Applicant: STMicroelectronics SA

Inventor： Manu Alibay ,  Stéphane Auberger ,  Bogdan-Florin Stanciulescu

IPC: H04N5/232 ,  G06K9/62 ,  G06K9/46 ,  G06T7/246

Abstract: A method generates a binary descriptor associated with a given point in a current frame of a succession of video frames obtained by an apparatus such as an image sensor. The method includes determining a pattern of points pairs around said given point in the current frame, and performing intensity comparison processing between the two points of each pair. The apparatus is likely to move in a rotation between the previous frame and the current frame. The method includes processing the pattern of points of the current frame with tridimensional rotation information representative of the apparatus rotation between the previous frame and the current frame and obtained from inertial measurements provided by at least one inertial sensor.