Integrated circuit, its fabrication process and memory cell incorporating such a circuit
    251.
    发明授权
    Integrated circuit, its fabrication process and memory cell incorporating such a circuit 有权
    集成电路,其制造工艺和包含这种电路的存储单元

    公开(公告)号:US07259414B2

    公开(公告)日:2007-08-21

    申请号:US10486950

    申请日:2002-08-14

    CPC classification number: H01L27/10894 H01L27/10852 H01L28/91

    Abstract: This integrated circuit comprises a capacitor (23) formed above a substrate (1) inside a first cavity in a dielectric and comprising a first electrode, a second electrode, a thin dielectric layer placed between the two electrodes, and a structure (7) for connection to the capacitor.The connection structure is formed at the same level as the capacitor in a second cavity narrower than the first cavity, the said second cavity being completely filled by an extension of at least one of the electrodes of the capacitor.

    Abstract translation: 该集成电路包括形成在电介质的第一空腔内部的衬底(1)上方的电容器(23),其包括第一电极,第二电极,设置在两个电极之间的薄介电层,以及用于 连接到电容器。 连接结构形成在与第一空腔更窄的第二空腔中的电容器相同的水平处,所述第二空腔由电容器的至少一个电极的延伸部完全填充。

    DEVICE FOR PROTECTING AN INTEGRATED CIRCUIT AGAINST LATCH-UP PHENOMENA
    252.
    发明申请
    DEVICE FOR PROTECTING AN INTEGRATED CIRCUIT AGAINST LATCH-UP PHENOMENA 有权
    用于保护整合电路的装置

    公开(公告)号:US20070188961A1

    公开(公告)日:2007-08-16

    申请号:US11626086

    申请日:2007-01-23

    CPC classification number: H01L27/0266 H01L27/0921

    Abstract: Device for protecting an integrated circuit, comprising a device for detecting a latch-up condition, and a supply voltage control device for controlling a supply voltage of the integrated circuit, to modify a parameter of the supply voltage of the integrated circuit in order to prevent the latch-up from becoming permanently established.

    Abstract translation: 用于保护集成电路的装置,包括用于检测闩锁状态的装置,以及用于控制集成电路的电源电压的电源电压控制装置,以修改集成电路的电源电压的参数,以防止 闩锁从永久建立。

    PULSED ELLIPSOMETER DEVICE
    253.
    发明申请
    PULSED ELLIPSOMETER DEVICE 审中-公开
    脉冲电流计器件

    公开(公告)号:US20070171420A1

    公开(公告)日:2007-07-26

    申请号:US11614673

    申请日:2006-12-21

    Inventor: Frederic Ferrieu

    CPC classification number: G01B11/0641 G01N21/211

    Abstract: An ellipsometry device includes a first pulsed source, and optical elements for generating polarization and/or phase and detection of polarization or analysis. A signal detector detects the generated pulses. A controller is coupled to the signal detector for generating feedback pulses or control pulses to the optical elements. The controller is also coupled to the signal detector.

    Abstract translation: 椭圆测量装置包括第一脉冲源和用于产生偏振和/或相位的光学元件以及偏振或分析的检测。 信号检测器检测所产生的脉冲。 控制器耦合到信号检测器,用于产生对光学元件的反馈脉冲或控制脉冲。 控制器还耦合到信号检测器。

    Lowpass biquad VGA filter
    254.
    发明申请
    Lowpass biquad VGA filter 有权
    低通双倍VGA滤波器

    公开(公告)号:US20070159240A1

    公开(公告)日:2007-07-12

    申请号:US11652386

    申请日:2007-01-10

    Applicant: Eoin Ohannaidh

    Inventor: Eoin Ohannaidh

    CPC classification number: H03H11/1213 H03H11/1286

    Abstract: A biquad gain stage, as well as a Variable Gain Amplifier is disclosed. The biquad gain stage comprises a plurality of transistors as well as conductances, and capacitances, as well as current sources. The resulting variable gain amplifier comprising a plurality of biquad gain stage cascaded in series allows to filter large unwanted blockers and to amplify a small wide-band signal. Both the gain and the filtering are distributed along a signal chain comprising a series of low-noise, high-Q biquad gain stages, each with limited current consumption and low component ratios.

    Abstract translation: 公开了双增益增益级以及可变增益放大器。 双倍增益级包括多个晶体管以及电导和电容以及电流源。 所产生的可变增益放大器包括串联级联的多个双二进制增益级,可以滤除大量不想要的阻塞器并放大小宽带信号。 增益和滤波都沿着包括一系列低噪声,高Q二级增益级的信号链分布,每个具有有限的电流消耗和低的分量比。

    METHOD FOR MANAGING THE ACCESS TO A MEMORY, BY USING PASSWORDS
    255.
    发明申请
    METHOD FOR MANAGING THE ACCESS TO A MEMORY, BY USING PASSWORDS 有权
    管理访问存储器的方法,使用密码

    公开(公告)号:US20070157029A1

    公开(公告)日:2007-07-05

    申请号:US11610610

    申请日:2006-12-14

    Inventor: Christophe Mani

    CPC classification number: G06F12/1425 G06F12/1433 G06F12/1466

    Abstract: A method for managing the access to a memory space shareable by several users, by using passwords, comprises: defining a maximum number of passwords, providing a password storage zone, dividing the shareable memory space into a plurality of blocks greater in number than the maximum number of passwords, providing in each block a parameterization field for parameterizing the protection of the block, providing in each parameterization field a binary index smaller in size than a password and designating a password assigned to the protection of the block, and allocating, to each block, access rights requiring a password to be presented corresponding to the password designated by the index present in the block parameterization field. Application is provided particularly but not exclusively to multi-user integrated circuits.

    Abstract translation: 一种用于管理由多个用户可共享的存储器空间的访问的方法,包括:定义最大密码数量,提供密码存储区域,将可共享存储器空间划分成多于最大数量的多个块 在每个块中提供用于参数化块的保护的参数化字段,在每个参数化字段中提供尺寸小于密码的二进制索引,并指定分配给该块的保护的密码,并将其分配给每个 阻止访问权限,要求对应于由块参数化字段中存在的索引指定的密码来呈现密码。 特别地但非排他地提供了多用户集成电路的应用。

    Integrated optical filter
    256.
    发明申请
    Integrated optical filter 审中-公开
    集成滤光片

    公开(公告)号:US20070147740A1

    公开(公告)日:2007-06-28

    申请号:US11605832

    申请日:2006-11-28

    CPC classification number: H01L27/14685 H01L27/14621

    Abstract: The disclosure relates to an integrated circuit comprising at least one photosensitive cell. The cell includes a photosensitive element, an input face associated with the said photosensitive element, an optical filter situated in at least one optical path leading to the photosensitive element and an interconnection part situated between the photosensitive element and the input face. The optical filter is disposed between the photosensitive element and the surface of the interconnection part closest to the input face. In particular, the optical filter can be disposed within the interconnection part. The disclosure also proposes that the filter be formed using a glass comprising cerium sulphide or at least one metal oxide.

    Abstract translation: 本公开涉及包括至少一个感光单元的集成电路。 单元包括感光元件,与所述感光元件相关联的输入面,位于通向感光元件的至少一个光路中的光学滤光器和位于感光元件和输入面之间的互连部件。 光学滤光器设置在感光元件和最靠近输入面的互连部件的表面之间。 特别地,滤光器可以布置在互连部分内。 本公开还提出使用包含硫化铈或至少一种金属氧化物的玻璃来形成过滤器。

    METHOD FOR DIVIDING A NUMBER BY A FRACTION HAVING A NUMBER IN THE FORM OF A POWER OF 2 AT THE NUMERATOR
    257.
    发明申请
    METHOD FOR DIVIDING A NUMBER BY A FRACTION HAVING A NUMBER IN THE FORM OF A POWER OF 2 AT THE NUMERATOR 有权
    一种数字分配方法,用数字表示的数字表示2位数字

    公开(公告)号:US20070146174A1

    公开(公告)日:2007-06-28

    申请号:US11612765

    申请日:2006-12-19

    CPC classification number: G06F7/535

    Abstract: A method divides a number N1 by a number which can be written in the form 2n/k, n and k being whole numbers, and obtains a result N2. The result N2 is calculated by adding terms N1*Ki/2n-i for i ranging from 0 to N, the terms Ki being the constituent bits K0, K1, K2, . . . KN-1 of the number k expressed in binary. The method can be applied particularly to the production of a calibration circuit for calibrating a clock signal in a UHF transponder.

    Abstract translation: 一种方法将数字N 1除以可以2×n / k形式写入的数字,n和k是整数,并且获得结果N 2。 通过对从0到N的i范围加上项N 1 * Ki / 2 i-i i i来计算结果N 2,项Ki是组成位K 0,K 1,K 2。 。 。 数字k的K-N-1 以二进制表示。 该方法可以特别适用于生产用于校准UHF转发器中的时钟信号的校准电路。

    Chip circuit comprising an inductor
    258.
    发明授权
    Chip circuit comprising an inductor 有权
    芯片电路包括电感器

    公开(公告)号:US07233055B2

    公开(公告)日:2007-06-19

    申请号:US11009695

    申请日:2004-12-10

    Inventor: Sebastien Grange

    Abstract: A chip circuit comprising a chip which comprises a semiconductor substrate and substantially plane components formed on the said substrate, among which there are an emitting component capable of emitting electromagnetic radiation and an inductor sensitive to the incident electromagnetic radiation. At least one shield, external to the chip, is placed opposite the inductor at a distance of less than 500 microns. The shield thus makes it possible to shield the sensitive inductor from the emitting component, while maintaining the quality factor of the inductor.

    Abstract translation: 一种芯片电路,包括芯片,其包括半导体衬底和形成在所述衬底上的基本上平面的部件,其中存在能够发射电磁辐射的发射部件和对入射的电磁辐射敏感的电感器。 在芯片外部的至少一个屏蔽件以小于500微米的距离放置在电感器的对面。 因此,屏蔽因此可以在保持感应器的品质因数的同时屏蔽敏感电感器与发光元件。

    Method for making a stack of capacitors, in particular for dynamic random access memory [DRAM]
    259.
    发明授权
    Method for making a stack of capacitors, in particular for dynamic random access memory [DRAM] 有权
    制造电容器堆叠的方法,特别是用于动态随机存取存储器[DRAM]

    公开(公告)号:US07224015B1

    公开(公告)日:2007-05-29

    申请号:US10129881

    申请日:2000-11-10

    CPC classification number: H01L27/10852 H01L27/10817 H01L28/60

    Abstract: The invention concerns a method which consists in forming on a substrate (1) coated with a dielectric material layer (3) provided with a window (3a), a stack of successive layers alternately of germanium or SiGe alloy (4, 6, 8) and polycrystalline silicon (5, 7, 9); selective partial elimination of the germanium or SiGe alloy layers, to form an tree-like structure; forming a thin layer of dielectric material (10) on the tree-like structure; and coating the tree-like structure with polycrystalline silicon (11). The invention is useful for making dynamic random-access memories.

    Abstract translation: 本发明涉及一种方法,该方法包括在涂覆有设置有窗口(3a)的介电材料层(3)的基底(1)上,交替地具有锗或SiGe合金(4,6,8 )和多晶硅(5,7,9); 选择性地部分消除锗或SiGe合金层,形成树状结构; 在树状结构上形成介电材料薄层(10); 并用多晶硅(11)涂覆树状结构。 本发明对于制作动态随机存取存储器是有用的。

    METHOD OF STORING DATA IN A MEMORY CIRCUIT FOR AHO-CORASICK TYPE CHARACTER RECOGNITION AUTOMATON AND CORRESPONDING STORAGE CIRCUIT
    260.
    发明申请
    METHOD OF STORING DATA IN A MEMORY CIRCUIT FOR AHO-CORASICK TYPE CHARACTER RECOGNITION AUTOMATON AND CORRESPONDING STORAGE CIRCUIT 有权
    在用于AHO-CORASICK型字符识别自动机和相应存储电路的存储器电路中存储数据的方法

    公开(公告)号:US20070104375A1

    公开(公告)日:2007-05-10

    申请号:US11555888

    申请日:2006-11-02

    CPC classification number: G06K9/723 G06K2209/01

    Abstract: A method of storing data in a memory circuit of an Aho-Corasick type character recognition automaton recognizes character strings by implementing successive transitions in a tree of nodes stored in a memory. Each node corresponds to a state of the automaton and to a recognition of a sequence of the character string. Each node is associated with a transition vector serves to determine the destination node or nodes of a transition. For storage of the data, a test is performed to find out whether transition vectors point to common destination addresses. The transition vectors are combined if the addresses to which the vectors point are separate by formulating a combination vector and the nodes are stored at the memory addresses pointed at by the combination vector.

    Abstract translation: 将数据存储在Aho-Corasick型字符识别自动机的存储器电路中的方法通过在存储器中存储的节点的树中实现连续的转换来识别字符串。 每个节点对应于自动机的状态和对字符串的序列的识别。 每个节点与转换向量相关联,用于确定转换的目标节点或节点。 为了存储数据,执行测试以确定转移向量是否指向公共目标地址。 如果通过制定组合向量将矢量点分开的地址与节点存储在由组合向量指向的存储器地址处,则组合转换向量。

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