Abstract:
A micro-electrical-mechanical system (MEMS) vibrating structure includes a carrier substrate, a first anchor, a second anchor, a single crystal piezoelectric body, a first conducting layer, and a second conducting layer. The first anchor and the second anchor are provided on the surface of the carrier substrate. The single-crystal piezoelectric body is suspended between the first anchor and the second anchor, and includes a uniform crystalline orientation defined by a set of Euler angles. The single-crystal piezoelectric body includes a first surface parallel to and facing the surface of the carrier substrate on which the first anchor and the second anchor are formed and a second surface opposite the first surface. The first conducting layer is inter-digitally dispersed on the second surface of the single-crystal piezoelectric body. The second conducting layer is inter-digitally dispersed on the first surface of the single-crystal piezoelectric body.
Abstract:
The present disclosure relates to RF front-end (RFFE) circuitry that includes multiple RFFE circuits, each of which may be provided by a separate integrated circuit (IC), front-end module, or both. As such, the RFFE circuits may be connected to one another using an RFFE serial communications bus. Further, one or more of the RFFE circuits may need an accurate clock source for analog-to-digital conversion (ADC), digital-to-analog conversion (DAC), calibration, sensor measurements, or the like. Instead of including an integral clock source circuit or receiving a separate external clock signal, an RFFE circuit may extract clock information from the RFFE serial communications bus to provide one or more clock signals. The clock information may be associated with one or more serial communications commands via the RFFE serial communications bus, may be associated with alternate functionality of the RFFE serial communications bus, or both.
Abstract:
The embodiments disclosed in the detailed description include a power amplifier having a low power mode amplifier, a medium power mode amplifier, and a high power mode amplifier in communication with a radio frequency (RF) output load. The exemplary embodiments of the power amplifier permit a wireless device to select the most power efficient means to transmit an RF signal based upon the desired output power level.
Abstract:
A switch mode power supply converter, a parallel amplifier, and a parallel amplifier output impedance compensation circuit are disclosed. The switch mode power supply converter provides a switching voltage and generates an estimated switching voltage output, which is indicative of the switching voltage. The parallel amplifier generates a power amplifier supply voltage at a power amplifier supply output based on a combination of a VRAMP signal and a high frequency ripple compensation signal. The parallel amplifier output impedance compensation circuit provides the high frequency ripple compensation signal based on a difference between the VRAMP signal and the estimated switching voltage output.
Abstract:
An envelope tracking power supply and an offset capacitive element are disclosed. The offset capacitive element is coupled between a switching output and an analog output of the envelope tracking power supply, which operates in one of an envelope tracking mode, a transition mode, and an average power tracking mode. During the envelope tracking mode, the envelope tracking power supply provides an envelope power supply signal using both the switching output and the analog output. During the transition mode, the envelope tracking power supply drives a voltage across the offset capacitive element from a first voltage to a second voltage, such that during a transition from the envelope tracking mode to the transition mode, the offset capacitive element has the first voltage, and during a transition from the transition mode to the average power tracking mode, the offset capacitive element has the second voltage.
Abstract:
A direct current (DC)-DC converter, which includes an open loop ripple cancellation circuit, a switching supply, and a parallel amplifier, is disclosed. During a calibration mode, the parallel amplifier provides a parallel amplifier output current to regulate a power supply output voltage based on a calibration setpoint. The switching supply drives the parallel amplifier output current toward zero using a switching control signal, such that during the calibration mode, an estimate of a current gain is based on the switching control signal. Further, during the calibration mode, the open loop ripple cancellation circuit is disabled. During a normal operation mode, the open loop ripple cancellation circuit provides a ripple cancellation current, which is based on the estimate of the current gain.
Abstract:
A switch mode power supply converter and a parallel amplifier are disclosed. The switch mode power supply converter is coupled to a modulated power supply output and the parallel amplifier has a parallel amplifier output coupled to the modulated power supply output. Further, the parallel amplifier has a group of output stages, such that each output stage is directly coupled to the parallel amplifier output and each output stage receives a separate supply voltage.
Abstract:
A field effect transistor (FET) having fingers with rippled edges is disclosed. The FET includes a semiconductor substrate having a front side with a finger axis. A drain finger is disposed on the front side of the semiconductor substrate such that a greatest dimension of the drain finger lies parallel to the finger axis. A gate finger is disposed on the front side of the semiconductor substrate. The gate finger is spaced from the drain finger such that a greatest dimension of the gate finger lies parallel to the finger axis. A source finger is disposed on the front side of the semiconductor substrate. The source finger is spaced from the gate finger such that a greatest dimension of the source finger lies parallel to the finger axis. The drain finger, the gate finger, and the source finger each have rippled edges with an axis parallel with the finger axis.
Abstract:
A radio front end that includes a diversity switch module adapted to route diversity receive (RX) signals to transceiver circuitry from diversity antenna switch circuitry coupled to at least one diversity antenna port is disclosed. The radio front end further includes ultrahigh band (UHB) switch circuitry adapted to route UHB transmit (TX) signals from power amplifier and switch circuitry to a UHB antenna port and/or to at least one diversity antenna port. The UHB switch circuitry is also adapted to route UHB RX signals from the UHB antenna port and/or to at least one antenna port to the transceiver circuitry, wherein the UHB RX signals include band 7 (B7) wherein linearity of the UHB switch circuitry is greater than linearity of the diversity switch module.
Abstract:
A wide bandwidth radio frequency amplifier is disclosed. The wide bandwidth radio frequency amplifier has a first signal path having a first input and a first output along with a first dual gate field effect transistor having a first-first gate coupled to the first input and a first drain coupled to the first output. The wide bandwidth radio frequency amplifier also includes a second signal path having a second input and a second output and a second dual gate field effect transistor having a second-first gate coupled to the second input and a second drain coupled to the second output.