公开(公告)号：US20140297993A1

公开(公告)日：2014-10-02

申请号：US14072428

申请日：2013-11-05

Applicant: VIA Technologies, Inc.

Inventor： G. Glenn Henry ,  Terry Parks ,  Rodney E. Hooker ,  John D. Bunda ,  Brent Bean

IPC: G06F9/30

CPC classification number: G06F9/26 ,  G06F9/30145 ,  G06F9/30174

Abstract: A microprocessor includes a plurality of processing cores each comprises a corresponding memory physically located inside the core and readable by the core but not readable by the other cores (“core memory”). The microprocessor also includes a memory physically located outside all of the cores and readable by all of the cores (“uncore memory”). For each core, the uncore memory and corresponding core memory collectively provide M words of storage for microcode instructions fetchable by the core as follows: the uncore memory provides J of the M words of microcode instruction storage, and the corresponding core memory provides K of the M words of microcode instruction storage. J, K and M are counting numbers, and M=J+K. The memories are non-architecturally-visible and accessed using a fetch address provided by a non-architectural program counter, and the microcode instructions are non-architectural instructions that implement architectural instructions.

Abstract translation: 微处理器包括多个处理核心，每个处理核心包括物理上位于核心内并由核心读取但不能被其他核心（“核心存储器”）读取的对应存储器。 微处理器还包括物理上位于所有核心外的所有核心（“非存储器”）可读取的存储器。 对于每个核心，非核存储器和对应的核心存储器共同提供M个字节的存储器，用于由核心获取的微代码指令，如下：非存储器提供微代码指令存储器的M个字节的J，并且相应的核心存储器提供K M码的微码指令存储。 J，K和M是计数数，M = J + K。 存储器是非架构可见的，并且使用由非架构程序计数器提供的提取地址来访问，并且微代码指令是实施架构指令的非架构指令。

公开(公告)号：US20140293547A1

公开(公告)日：2014-10-02

申请号：US13898486

申请日：2013-05-21

Applicant: VIA Technologies, Inc.

Inventor： Chen-Yueh Kung

IPC: H05K1/18 ,  H05K3/40

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/4882 ,  H01L21/563 ,  H01L23/13 ,  H01L23/3185 ,  H01L23/3675 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/10 ,  H01L2224/16157 ,  H01L2224/73204 ,  H05K1/112 ,  H05K1/119 ,  H05K1/181 ,  H05K3/0026 ,  H05K3/28 ,  H05K3/4007 ,  H05K2201/09472 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2203/0723 ,  H05K2203/107 ,  H05K2203/1476 ,  Y10T29/49156

Abstract: A circuit substrate has the following elements. A stacked circuit structure has a first surface and a second surface opposite thereto surface. A first patterned inner conductive layer is disposed on the first surface and has multiple pads. A first patterned outer conductive layer is disposed on the patterned inner conductive layer and has multiple conductive pillars, wherein each of the first conductive pillar is located on the corresponding first pad. The first dielectric layer covers the first surface, the first patterned inner conductive layer and the first patterned outer conductive layer, and has multiple first concaves, wherein the first concave exposes the top and side of the corresponding first conductive pillar. A semiconductor package structure applied the above circuit substrate and a process for fabricating the same are also provided here.

Abstract translation: 电路基板具有以下元件。 层叠电路结构具有与其相对的第一表面和第二表面。 第一图案化内导电层设置在第一表面上并具有多个焊盘。 第一图案化外导电层设置在图案化的内导电层上并且具有多个导电柱，其中第一导电柱中的每一个位于相应的第一焊盘上。 第一介电层覆盖第一表面，第一图案化内导电层和第一图案化外导电层，并且具有多个第一凹部，其中第一凹部暴露对应的第一导电柱的顶部和侧面。 应用上述电路基板的半导体封装结构及其制造方法也在这里提供。

公开(公告)号：US20140258641A1

公开(公告)日：2014-09-11

申请号：US13792428

申请日：2013-03-11

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Rodney E. Hooker ,  John Michael Greer

IPC: G06F12/08

CPC classification number: G06F12/0862 ,  G06F2212/6026

Abstract: A microprocessor includes a first and second hardware data prefetchers configured to prefetch data into the microprocessor according to first and second respective algorithms, which are different. The second prefetcher is configured to detect a memory access pattern within a memory region and responsively prefetch data from the memory region according the second algorithm. The second prefetcher is further configured to provide to the first prefetcher a descriptor of the memory region. The first prefetcher is configured to stop prefetching data from the memory region in response to receiving the descriptor of the memory region from the second prefetcher. The second prefetcher also provides to the first prefetcher a communication to resume prefetching data from the memory region, such as when the second prefetcher subsequently detects that a predetermined number of memory accesses to the memory region are not in the memory access pattern.

Abstract translation: 微处理器包括第一和第二硬件数据预取器，其被配置为根据不同的第一和第二相应算法将数据预取入微处理器。 第二预取器被配置为检测存储器区域内的存储器访问模式，并且根据第二算法响应地从存储器区域预取数据。 第二预取器还被配置为向第一预取器提供存储器区域的描述符。 响应于从第二预取器接收到存储器区域的描述符，第一预取器被配置为停止从存储器区域预取数据。 第二预取器还向第一预取器提供通信以恢复从存储器区域预取数据，例如当第二预取器随后检测到对存储器区域的预定数量的存储器访问不在存储器访问模式中时。

公开(公告)号：US20140223079A1

公开(公告)日：2014-08-07

申请号：US13959761

申请日：2013-08-06

Applicant: VIA Technologies, Inc

Inventor： Bo Zhang ,  Chen Xiu

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7201

Abstract: A non-volatile memory (NVM) apparatus and an operation method thereof are provided. A mapping table in a main memory is divided into a plurality of sub-mapping tables according to logical address groups. When an access command of a host is processed by the NVM apparatus, at least one corresponding sub-mapping table is selected from the sub-mapping tables according to a logical address of the access command. If the at least one corresponding sub-mapping table is required to be rebuilt, then the at least one corresponding sub-mapping table is rebuilt, and the logical address of the access command is converter for accessing the NVM apparatus according to the at least one corresponding sub-mapping table which has been rebuilt.

Abstract translation: 提供了一种非易失性存储器（NVM）装置及其操作方法。 主存储器中的映射表根据逻辑地址组被划分为多个子映射表。 当由NVM装置处理主机的访问命令时，根据访问命令的逻辑地址从子映射表中选择至少一个对应的子映射表。 如果需要重建所述至少一个对应的子映射表，则重建所述至少一个对应的子映射表，并且所述访问命令的逻辑地址是根据所述至少一个访问所述NVM设备的转换器 相应的子映射表已被重建。

公开(公告)号：US20140188835A1

公开(公告)日：2014-07-03

申请号：US14144557

申请日：2013-12-31

Applicant: VIA Technologies, Inc.

Inventor： Guo-Feng Zhang ,  Yi-Fei Zhu

IPC: G06F17/30 ,  G06F17/28 ,  G06F17/27

CPC classification number: G06F17/28 ,  G06F17/2705 ,  G06F17/271 ,  G06F17/2785 ,  G06F17/30312 ,  G06F17/30401 ,  G06F17/30864

Abstract: A search method, a search system, and a natural language comprehension system are provided. The search system includes a structured database and a search engine. The structured database stores a plurality of records, each of which has a title field and a content field. The title field includes at least one sub-field, and each sub-field includes an indication field and a value field. The indication field stores indication data, the value field stores value data, and the content field stores detailed content data. The search engine conducts a full-text search to the records in the structured database according to a keyword derived from a user's request formation, and a search result is transmitted to a knowledge comprehension assistance module, so as to recognize the user's intention. After the user's intention is recognized, information associated with the recognized user's intention is transmitted back to the user.

Abstract translation: 提供了搜索方法，搜索系统和自然语言理解系统。 搜索系统包括结构化数据库和搜索引擎。 结构化数据库存储多个记录，每个记录具有标题字段和内容字段。 标题字段包括至少一个子字段，并且每个子字段包括指示字段和值字段。 指示字段存储指示数据，值字段存储值数据，并且内容字段存储详细的内容数据。 搜索引擎根据从用户请求格式导出的关键字对结构化数据库中的记录进行全文搜索，并将搜索结果发送到知识理解辅助模块，以便识别用户的意图。 在识别出用户的意图之后，将与识别的用户的意图相关联的信息发送回用户。

公开(公告)号：US20140188477A1

公开(公告)日：2014-07-03

申请号：US14142932

申请日：2013-12-30

Applicant: VIA Technologies, Inc.

Inventor： Guo-Feng Zhang

IPC: G10L15/18

CPC classification number: G10L15/22 ,  G10L15/1822 ,  G10L2015/088

Abstract: A natural language dialogue system and a method capable of correcting a speech response are provided. The method includes following steps. A first speech input is received. At least one keyword included in the first speech input is parsed to obtain a candidate list having at least one report answers. One of the report answers is selected from the candidate list as a first report answer, and a first speech response is output according to the first report answer. A second speech input is received and parsed to determine whether the first report answer is correct. If the first report answer is incorrect, another report answer other than the first report answer is selected from the candidate list as a second report answer. According to the second report answer, a second speech response is output.

Abstract translation: 提供了一种自然语言对话系统和能够校正语音响应的方法。 该方法包括以下步骤。 接收到第一个语音输入。 解析包含在第一语音输入中的至少一个关键字以获得具有至少一个报告答案的候选列表。 从候选列表中选择报告答案中的一个作为第一报告答案，并且根据第一报告答案输出第一语音响应。 接收并解析第二个语音输入，以确定第一个报告答案是否正确。 如果第一个报告答案不正确，则从候选人名单中选出除第一个报告答复之外的其他报告回答作为第二个报告答案。 根据第二报告答案，输出第二个语音响应。

公开(公告)号：US20140167714A1

公开(公告)日：2014-06-19

申请号：US14091579

申请日：2013-11-27

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Yu-Chung WEI

IPC: H02M1/36 ,  H02M3/156

CPC classification number: H02M1/36

Abstract: A soft-start circuit is provided. The soft-start circuit generates an output voltage at an output terminal. The soft-start includes a transistor, a capacitor, and a current source. The transistor has a first terminal receiving an input voltage, a second terminal coupled to the output terminal, and a control terminal. The capacitor is coupled between the second terminal and the control terminal of the transistor. The current source is coupled between the control terminal of the transistor and a ground terminal. The capacitor and the current source modulate the output voltage by modulating a driving voltage at the control terminal to perform a soft-start operation of the output voltage.

Abstract translation: 提供软启动电路。 软启动电路在输出端产生输出电压。 软启动包括晶体管，电容器和电流源。 晶体管具有接收输入电压的第一端子，耦合到输出端子的第二端子和控制端子。 电容器耦合在第二端子和晶体管的控制端子之间。 电流源耦合在晶体管的控制端和接地端之间。 电容器和电流源通过调制控制端的驱动电压来调制输出电压，以执行输出电压的软启动操作。

公开(公告)号：US20140149122A1

公开(公告)日：2014-05-29

申请号：US13736972

申请日：2013-01-09

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Guo-Feng Zhang

IPC: G10L17/22

CPC classification number: G10L15/22 ,  G06F1/3203 ,  G06F1/3231 ,  G10L15/28 ,  G10L2015/223 ,  Y02D10/173

Abstract: A voice control device and a corresponding voice control method are provided. The voice control device includes a sound receiver, a sound converter, a voice identifier, and a central processing unit (CPU). The sound receiver receives a first sound signal. The sound converter converts the first sound signal from analog signal to digital signal. The voice identifier identifies a first voice signal from the first sound signal, performs a first comparison on the first voice signal and a second voice signal, and generates a wake-up signal according to the first comparison. When receiving the wake-up signal, the CPU enters a working state from a sleeping state, performs a second comparison on the first voice signal and the second voice signal, and takes over the voice input from the sound receiver and the sound converter according to the second comparison.

Abstract translation: 提供语音控制装置和对应的语音控制方法。 语音控制装置包括声音接收器，声音转换器，语音标识符和中央处理单元（CPU）。 声音接收器接收第一声音信号。 声音转换器将第一声音信号从模拟信号转换成数字信号。 语音标识符识别来自第一声音信号的第一语音信号，对第一语音信号和第二语音信号执行第一比较，并且根据第一比较产生唤醒信号。 当接收到唤醒信号时，CPU从睡眠状态进入工作状态，对第一语音信号和第二语音信号执行第二比较，并接收来自声音接收器和声音转换器的语音输入，根据 第二个比较。

公开(公告)号：US08726185B1

公开(公告)日：2014-05-13

申请号：US13666970

申请日：2012-11-02

Applicant: VIA Technologies, Inc.

Inventor： Guo-Feng Zhang ,  Yi-Fei Zhu

IPC: G06F3/048

CPC classification number: G06T11/00 ,  G06F9/451 ,  G06T15/503

Abstract: A method and apparatus for rendering overlapped objects are provided. In the method, multiple objects are sorted according to rendering properties thereof and placed into a source chain. As for a target object in the source chain, an object first overlapped with the target object is successively searched. If no overlapped object is found, the target object is moved to a target chain. Otherwise, a blending object is generated by blending an overlapping area of the target object and overlapped object according to an alpha-blending property thereof and the blending object and all non-overlapping areas of the target object and overlapped object are inserted respectively as a new object into the source chain. The above steps are repeated until all objects in the source chain are moved to the target chain. Finally, the objects in the target chain are rendered on an electronic device.

Abstract translation: 提供了一种用于渲染重叠对象的方法和装置。 在该方法中，根据其渲染属性对多个对象进行排序并将其放入源链中。 对于源链中的目标对象，连续地搜索与目标对象首先重叠的对象。 如果没有找到重叠对象，则将目标对象移动到目标链。 否则，通过根据其混合属性混合目标对象和重叠对象的重叠区域并且将目标对象和重叠对象的混合对象和所有非重叠区域分别插入作为新的对象来生成混合对象 对象进入源链。 重复上述步骤，直到源链中的所有对象都移动到目标链。 最后，目标链中的对象在电子设备上呈现。

公开(公告)号：US20140108706A1

公开(公告)日：2014-04-17

申请号：US13940942

申请日：2013-07-12

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Kuan-Jui HO ,  Tsung-Pin YANG

IPC: G11C7/22 ,  G11C7/10

CPC classification number: G11C7/22 ,  G06F12/0246 ,  G11C7/1072 ,  G11C7/1093

Abstract: A storage media control method, by which a data strobe signal is shifted by different phase shifts at different time intervals during a write-leveling operation to be received by a storage media and compared to a clock signal for returning a data signal. At the storage media side, during the write-leveling operation, a synchronous transmission between the received data strobe signal and the clock signal causes a transition event at the data signal. The number of transition-event occurrences is counted. When the count shows that just one transition event has occurred over a full round of phase shift tests of the data strobe signal, the phase shift corresponding to the transition event is used in the adjustment of the data strobe signal, which is received by the storage media as the data extraction reference of a write operation.

Abstract translation: 一种存储介质控制方法，通过该存储介质控制方法，数据选通信号在写平均化操作期间以不同的时间间隔移位以由存储介质接收并与用于返回数据信号的时钟信号进行比较。 在存储介质侧，在写入均衡操作期间，接收的数据选通信号和时钟信号之间的同步传输导致数据信号处的转换事件。 计算过渡事件发生次数。 当计数显示在数据选通信号的全面相移测试中仅发生一个转换事件时，与转换事件相对应的相移用于数据选通信号的调整，该数据选通信号由存储器接收 媒体作为写入操作的数据提取参考。