公开(公告)号：US20110161634A1

公开(公告)日：2011-06-30

申请号：US12926350

申请日：2010-11-12

申请人： Hiroaki Sakaguchi

发明人： Hiroaki Sakaguchi

IPC分类号： G06F9/38 ,  G06F9/30

CPC分类号： G06F9/30134 ,  G06F9/30145 ,  G06F9/30163 ,  G06F9/30167 ,  G06F9/322 ,  G06F9/324 ,  G06F9/3853 ,  G06F9/3877 ,  G06F9/3881

摘要： A processor includes a buffer that separates a sequence of instructions having no operand into segments and stores the segments, a data holder that holds data to be processed, a decoder that references the data and sequentially decodes at least one of the instructions from the top of the sequence, an instruction execution unit that executes the instruction, and an instruction sequence control unit that controls updating of the instruction sequence in accordance with the decoding result. When the decoded top instruction is a branch instruction and if a branch is taken, the instruction sequence control unit updates the sequence so that the top instruction of one of the segments is located at the top of the sequence. If a branch is not taken, the instruction sequence control unit updates the sequence so that an instruction immediately next to the branch instruction is located at the top of the sequence.

摘要翻译： 处理器包括一个缓冲器，该缓冲器将没有操作数的指令序列分离成段并存储段，保存要处理数据的数据保持器，引用该数据的解码器，并从至少一个指令从 所述序列，执行所述指令的指令执行单元，以及根据所述解码结果控制所述指令序列的更新的指令序列控制单元。 当解码的顶部指令是分支指令并且如果采用分支时，指令序列控制单元更新该序列，使得其中一个段的顶部指令位于序列的顶部。 如果不采取分支，则指令序列控制单元更新序列，使得紧邻分支指令的指令位于序列的顶部。

公开(公告)号：US20090273491A1

公开(公告)日：2009-11-05

申请号：US12431828

申请日：2009-04-29

申请人： Hiroaki SAKAGUCHI ,  Hiroshi Yoshikawa

发明人： Hiroaki SAKAGUCHI ,  Hiroshi Yoshikawa

IPC分类号： H03M7/00 ,  H03M7/34

CPC分类号： H03M7/4006 ,  G06F9/30018 ,  G06F2009/3883 ,  H04N19/44 ,  H04N19/91

摘要： Disclosed herein is an arithmetic decoding device including: an arithmetic decoding unit configured to decode coded data resulting from arithmetic coding on a basis of a context variable indicating a probability state and a most probable symbol; a plurality of arithmetic registers configured to supply the context variable to the arithmetic decoding unit and retain a result of operation by the arithmetic decoding unit; and a plurality of save registers configured to save contents retained in the arithmetic registers.

摘要翻译： 本文公开了一种算术解码装置，包括：算术解码单元，被配置为基于指示概率状态的上下文变量和最可能的符号来解码由算术编码产生的编码数据; 多个算术寄存器，被配置为将所述上下文变量提供给所述算术解码单元，并且保留所述算术解码单元的操作结果; 以及多个保存寄存器，被配置为保存保留在算术寄存器中的内容。

公开(公告)号：US07176269B2

公开(公告)日：2007-02-13

申请号：US10070507

申请日：2001-07-24

申请人： Takashi Hakuta ,  Masaaki Kawasaki ,  Yoshiharu Kikuchi ,  Mitsunao Arino ,  Mitsuko Nagai ,  Hiroaki Sakaguchi ,  Masaki Sugawara ,  Masao Kishi ,  Kaoru Ueno ,  Takashi Abe ,  Michio Sekine

发明人： Takashi Hakuta ,  Masaaki Kawasaki ,  Yoshiharu Kikuchi ,  Mitsunao Arino ,  Mitsuko Nagai ,  Hiroaki Sakaguchi ,  Masaki Sugawara ,  Masao Kishi ,  Kaoru Ueno ,  Takashi Abe ,  Michio Sekine

IPC分类号： C08G77/60

CPC分类号： B32B17/10302 ,  C08F210/18 ,  C08F230/08 ,  C08L23/16 ,  C08L83/00 ,  C08L83/04 ,  C08L2312/08 ,  C09D123/16 ,  C09J123/16 ,  C08F210/06 ,  C08F2500/25 ,  C08F2500/21

摘要： The curable composition of the present invention contains (A1) a silyl-containing ethylene/α-olefin/non-conjugated polyene random copolymer rubber which has a structural unit derived from a norbornene compound as the non-conjugated polyene with at least one specific vinyl group at the terminal and contains a specific hydrolyzable silyl group, and (B) a compound, other than the rubber (A1), having a hydroxyl group and/or a hydrolyzable group, e.g., (B1) a compound having a silanol group and/or a compound which can react with moisture to form a compound having a silanol group in the molecule.This compound improves elongation of the cured product and residual surface tackiness, and, at the same time, is high in curing speed and capable of giving the cured product of high resistance to weather. It is suitable for, e.g., adhesives, tackifiers, paints, sealants, waterproof materials, spray materials, shaping materials and casting rubber materials.

摘要翻译： 本发明的固化性组合物含有（A1）含有甲硅烷基的乙烯/α-烯烃/非共轭多烯无规共聚物橡胶，其具有衍生自作为非共轭多烯的降冰片烯化合物的结构单元与至少一种特定的乙烯基 并且含有特定的可水解甲硅烷基，（B）除具有羟基和/或可水解基团的橡胶（A1）以外的化合物，例如（B1）具有硅烷醇基的化合物和 /或可与水分反应形成分子中具有硅烷醇基的化合物的化合物。 该化合物提高了固化物的伸长率和残留的表面粘性，同时固化速度高，能够赋予高耐候性的固化物。 它适用于例如粘合剂，增粘剂，油漆，密封剂，防水材料，喷涂材料，成形材料和铸造橡胶材料。

公开(公告)号：US5723664A

公开(公告)日：1998-03-03

申请号：US525439

申请日：1995-09-07

申请人： Hiroaki Sakaguchi ,  Kenji Fujii ,  Shigenori Sakai ,  Yoshiyuki Kobayashi ,  Yasushi Kita

发明人： Hiroaki Sakaguchi ,  Kenji Fujii ,  Shigenori Sakai ,  Yoshiyuki Kobayashi ,  Yasushi Kita

IPC分类号： C07C303/38 ,  C07C311/09 ,  C07C311/48 ,  C07D213/20

CPC分类号： C07D213/20 ,  C07C303/38

摘要： The invention relates to a method of preparing a sulfonimide, a first salt thereof, or a second salt thereof. The method includes the step of: (a) reacting one or two sulfonyl fluorides with nonhydrous ammonia and an amine component which is one of a tertiary amine and a heterocyclic amine, so as to prepare the first salt. Alternatively, the method includes the step of: (a) reacting the sulfonyl fluoride with the amine component and a sulfonamide, so as to prepare the first salt. The method further optionally includes, after the step (a), the step of: (b) reacting, in an aqueous solution, the first salt with a metal compound, so as to prepare the second salt. The method still further optionally includes, after the step (a), the step of: (c) reacting the first salt with a strong acid so as to prepare the sulfonimide. Alternatively, the method further optionally includes, after the step (b), the step of: (d) reacting the second salt with a strong acid so as to prepare the sulfonimide. The sulfonimide, the first salt or the second salt is easily economically prepared in an industrial scale production with high purity and high yield.

摘要翻译： 本发明涉及制备磺酰亚胺，其第一种盐或其第二种盐的方法。 所述方法包括以下步骤：（a）使一种或两种磺酰氟与非水氨反应，和作为叔胺和杂环胺之一的胺组分反应，以制备第一种盐。 或者，该方法包括以下步骤：（a）使磺酰氟与胺组分和磺酰胺反应，以制备第一种盐。 该方法进一步任选地包括在步骤（a）之后的步骤：（b）在水溶液中使第一盐与金属化合物反应，以制备第二种盐。 该方法还可任选地在步骤（a）之后包括以下步骤：（c）使第一种盐与强酸反应，以制备磺酰亚胺。 或者，该方法进一步任选地包括在步骤（b）之后的步骤：（d）使第二盐与强酸反应，以制备磺酰亚胺。 磺酰亚胺，第一盐或第二盐在工业规模生产中以高纯度和高产率容易地经济地制备。

公开(公告)号：US09671124B2

公开(公告)日：2017-06-06

申请号：US14651814

申请日：2013-03-04

申请人： Hiroaki Sakaguchi ,  Mitsuru Kitazaki

发明人： Hiroaki Sakaguchi ,  Mitsuru Kitazaki

IPC分类号： G05B15/00 ,  F24F11/00 ,  G06F11/00 ,  G05B15/02 ,  G06F3/06 ,  G06F17/30

CPC分类号： F24F11/006 ,  F24F11/30 ,  F24F11/32 ,  F24F11/62 ,  F24F11/63 ,  G05B15/02 ,  G06F3/0617 ,  G06F3/0653 ,  G06F3/0673 ,  G06F11/00 ,  G06F17/30339 ,  G06F17/30477

摘要： A remaining memory capacity of a memory is acquired in a predetermined cycle, and remaining memory capacity MR is stored in a remaining capacity database in association with an acquisition date. After that, it is determined whether or not a memory leak is present based on the remaining memory capacity and the acquisition date stored in the remaining capacity database. When it is determined that the memory leak possibly occurs, a usage limit period being a length of time to a point when a forced restart according to a usage limit threshold is performed is computed based on the remaining memory capacity and a memory decreasing rate. A restart schedule (and an all-stop period) is set within the usage limit period. On a date of the restart schedule, a management apparatus for managing an air-conditioning apparatus is restarted.

公开(公告)号：US08650385B2

公开(公告)日：2014-02-11

申请号：US13024580

申请日：2011-02-10

申请人： Hitoshi Kai ,  Hiroaki Sakaguchi ,  Hiroshi Kobayashi ,  Katsuhiko Metsugi ,  Haruhisa Yamamoto ,  Yousuke Morita ,  Koichi Hasegawa ,  Taichi Hirao

发明人： Hitoshi Kai ,  Hiroaki Sakaguchi ,  Hiroshi Kobayashi ,  Katsuhiko Metsugi ,  Haruhisa Yamamoto ,  Yousuke Morita ,  Koichi Hasegawa ,  Taichi Hirao

IPC分类号： G06F9/30 ,  G06F9/40 ,  G06F15/00

CPC分类号： G06F9/321 ,  G06F9/30101 ,  G06F9/30156 ,  G06F9/30167 ,  G06F9/30178 ,  G06F9/3804 ,  G06F9/3842

摘要： An instruction fetch apparatus is disclosed which includes: a program counter configured to manage the address of an instruction targeted to be executed in a program in which instructions belonging to a plurality of instruction sequences are placed sequentially; a change designation register configured to designate a change of an increment value on the program counter; an increment value register configured to hold the changed increment value; and an addition control section configured such that if the change designation register designates the change of the increment value on the program counter, then the addition control section increments the program counter based on the changed increment value held in the increment value register, the addition control section further incrementing the program counter by an instruction word length if the change designation register does not designate any change of the increment value on the program counter.

摘要翻译： 一种提取指令装置，其特征在于包括：程序计数器，被配置为在其中顺序放置属于多个指令序列的指令的程序中管理目标要执行的指令的地址; 变更指定寄存器，被配置为指定所述程序计数器上的增量值的变化; 增量值寄存器，被配置为保持所述改变的增量值; 以及附加控制部分，其被配置为使得如果所述改变指定寄存器指定所述程序计数器上的所述增量值的改变，则所述相加控制部分基于所述增量值寄存器中保持的改变的增量值来增加所述程序计数器，所述加法控制 如果改变指定寄存器没有指定程序计数器上的增量值的任何改变，则进一步将程序计数器递增指令字长度。

公开(公告)号：US20120147045A1

公开(公告)日：2012-06-14

申请号：US13324044

申请日：2011-12-13

申请人： Hiroshi OIKE ,  Hiroaki Sakaguchi ,  Yuichi Oda ,  Tomoo Nakano ,  Yasushi Usami

发明人： Hiroshi OIKE ,  Hiroaki Sakaguchi ,  Yuichi Oda ,  Tomoo Nakano ,  Yasushi Usami

IPC分类号： G09G5/00

CPC分类号： G06F3/04845 ,  G03B17/20 ,  G06F3/0483 ,  G06F3/04883

摘要： An image display apparatus including a first storage means for storing at least one item of image data, correction condition data for correcting the image data, and corrected image data obtained after the image data is corrected on the basis of the correction condition data; an image processing means for producing the corrected image data; a display means comprising a screen for superimposing an original image based on the image data and a corrected image based on the corrected image data onto each other and displaying either the original image or the corrected image; an input means for selecting an image to be displayed on the display screen, and a display control means for switching between the images in response to an input from the input means, so that either the original image or the corrected image is displayed on the display screen.

摘要翻译： 一种图像显示装置，包括：用于存储图像数据的至少一个项目的第一存储装置，用于校正图像数据的校正条件数据;以及基于校正条件数据校正图像数据之后获得的校正图像数据; 用于产生校正后的图像数据的图像处理装置; 显示装置，其包括用于基于图像数据叠加原始图像的屏幕和基于校正图像数据的校正图像彼此并显示原始图像或校正图像; 用于选择要在显示屏幕上显示的图像的输入装置，以及用于响应于来自输入装置的输入而在图像之间切换的显示控制装置，使得原始图像或校正图像被显示在显示器上 屏幕。

公开(公告)号：US07830281B2

公开(公告)日：2010-11-09

申请号：US12417262

申请日：2009-04-02

申请人： Hiroaki Sakaguchi

发明人： Hiroaki Sakaguchi

IPC分类号： H03M7/40

CPC分类号： H03M7/40

摘要： Disclosed herein is a variable-length code decoding apparatus including: a code buffer that holds a variable-length code in which the same bit value continues for a given number of bits from the most significant bit; code word detectors each of which reads the variable-length code from the code buffer to detect whether the variable-length code matches a specified code word; a decoded code word determination block that determines a code word decoded; and a configuration information holding section that holds configuration information containing the specified code words and code lengths of the specified code words as arranged in an ascending order of code length.

摘要翻译： 这里公开了一种可变长度码解码装置，包括：代码缓冲器，其保存从最高有效位向同一位值持续给定位数的可变长度代码; 代码字检测器，每个代码字检测器从代码缓冲器读取可变长度代码，以检测可变长度代码是否与指定代码字匹配; 确定解码的码字的解码码字确定块; 以及配置信息保持部分，其保存包含指定代码字的配置信息和按代码长度的升序排列的指定代码字的代码长度。

公开(公告)号：US07725520B2

公开(公告)日：2010-05-25

申请号：US11274233

申请日：2005-11-16

申请人： Hiroaki Sakaguchi ,  Koichi Hasegawa

发明人： Hiroaki Sakaguchi ,  Koichi Hasegawa

IPC分类号： G06F7/32 ,  G06F7/38

CPC分类号： G06F17/10 ,  G06F9/3001 ,  G06F9/30036 ,  G06F9/325

摘要： The present invention provides a processor including data manipulating means for generating an arbitrary combination of elements of a first input vector and elements of a second input vector, arithmetic means for performing a product-sum operation on the combination, and repetition control means for controlling the generation of the combination by the data manipulating means and the product-sum operation by the arithmetic means according to a number of the elements of the first input vector and the second input vector.

摘要翻译： 本发明提供了一种处理器，包括用于产生第一输入向量的元素和第二输入向量的元素的任意组合的数据操作装置，用于对该组合执行乘积和运算的算术装置，以及用于控制 根据第一输入向量和第二输入向量的元素的数量，通过数据操作装置生成组合和乘法运算。

公开(公告)号：US20090261995A1

公开(公告)日：2009-10-22

申请号：US12417262

申请日：2009-04-02

申请人： Hiroaki SAKAGUCHI

发明人： Hiroaki SAKAGUCHI

IPC分类号： H03M7/40

CPC分类号： H03M7/40

摘要： Disclosed herein is a variable-length code decoding apparatus including: a code buffer that holds a variable-length code in which the same bit value continues for a given number of bits from the most significant bit; code word detectors each of which reads the variable-length code from the code buffer to detect whether the variable-length code matches a specified code word; a decoded code word determination block that determines a code word decoded; and a configuration information holding section that holds configuration information containing the specified code words and code lengths of the specified code words as arranged in an ascending order of code length.

摘要翻译： 这里公开了一种可变长度码解码装置，包括：代码缓冲器，其保存从最高有效位向同一位值持续给定位数的可变长度代码; 代码字检测器，每个代码字检测器从代码缓冲器读取可变长度代码，以检测可变长度代码是否与指定代码字匹配; 确定解码的码字的解码码字确定块; 以及配置信息保持部分，其保存包含指定代码字的配置信息和按代码长度的升序排列的指定代码字的代码长度。