OUTPUT DRIVER
    21.
    发明申请
    OUTPUT DRIVER 失效
    输出驱动器

    公开(公告)号:US20090059712A1

    公开(公告)日:2009-03-05

    申请号:US12165154

    申请日:2008-06-30

    CPC classification number: H03K19/018521 G11C7/1051 G11C7/1054 G11C11/4093

    Abstract: An output driver is applicable to two or more interface standards. The output driver includes a pre-driver configured to generate pull-up control signals and pull-down control signals according to a logic value of data to be output and a target resistance, and adjust slew rates of the pull-up control signals and the pull-down control signals according to operation modes, and a driver configured to output the data in response to the pull-up and pull-down control signals.

    Abstract translation: 输出驱动器适用于两个或多个接口标准。 输出驱动器包括预驱动器,其被配置为根据要输出的数据的逻辑值和目标电阻产生上拉控制信号和下拉控制信号,并且调整上拉控制信号的转换速率和 根据操作模式的下拉控制信号,以及配置为响应于上拉和下拉控制信号输出数据的驱动器。

    Open-loop slew-rate controlled output driver
    22.
    发明授权
    Open-loop slew-rate controlled output driver 有权
    开环压摆率控制输出驱动器

    公开(公告)号:US07449936B2

    公开(公告)日:2008-11-11

    申请号:US11482684

    申请日:2006-07-06

    Abstract: A slew-rate controlled output driver for use in a semiconductor device includes a PVT variation detection unit having a delay line for receiving a reference clock in order to detect a delay amount variation of the delay line determined according to process, voltage and temperature (PVT) variation; a selection signal generation unit for generating a driving selection signal which corresponds to a detection signal generated by the PVT variation detection unit; and an output driving unit having a plurality of driver units controlled by an output data and the driving selection signal for driving an output terminal with a driving strength which corresponds to the PVT variation.

    Abstract translation: 用于半导体器件的转换速率控制输出驱动器包括具有用于接收参考时钟的延迟线的PVT变化检测单元,以便检测根据处理,电压和温度(PVT)确定的延迟线的延迟量变化 )变异 选择信号生成单元,用于产生对应于由PVT变化检测单元生成的检测信号的驱动选择信号; 以及输出驱动单元,其具有由输出数据控制的多个驱动器单元和用于以对应于PVT变化的驱动强度来驱动输出端子的驱动选择信号。

    Memory system
    23.
    发明授权
    Memory system 有权
    内存系统

    公开(公告)号:US08817566B2

    公开(公告)日:2014-08-26

    申请号:US13340868

    申请日:2011-12-30

    CPC classification number: G11C11/40603 G11C11/40611 G11C11/40615

    Abstract: A memory system includes: a controller configured to provide a hidden auto refresh command; and a memory configured to perform a refresh operation in response to the hidden auto refresh command. The controller and the memory communicate with each other so that each refresh address of the controller and the memory has the same value as each other.

    Abstract translation: 存储器系统包括:控制器,被配置为提供隐藏的自动刷新命令; 以及被配置为响应于所述隐藏的自动刷新命令执行刷新操作的存储器。 控制器和存储器彼此通信,使得控制器和存储器的每个刷新地址彼此具有相同的值。

    Semiconductor apparatus
    24.
    发明授权
    Semiconductor apparatus 有权
    半导体装置

    公开(公告)号:US08618541B2

    公开(公告)日:2013-12-31

    申请号:US13341299

    申请日:2011-12-30

    CPC classification number: H01L25/065 H01L23/481 H01L2924/0002 H01L2924/00

    Abstract: A semiconductor apparatus includes first and second vias, a first circuit unit, a second circuit unit and a third circuit unit. The first and second vias electrically connect a first chip and a second chip with each other. The first circuit unit is disposed in the first chip, receives test data, and is connected with the first via. The second circuit unit is disposed in the first chip, and is connected with the second via and the first circuit unit. The third circuit unit is disposed in the second chip, and is connected with the first via. The first circuit unit outputs an output signal thereof to one of the first via and the second circuit unit in response to a first control signal.

    Abstract translation: 半导体装置包括第一和第二通孔,第一电路单元,第二电路单元和第三电路单元。 第一和第二通孔将第一芯片和第二芯片彼此电连接。 第一电路单元设置在第一芯片中,接收测试数据,并与第一通孔连接。 第二电路单元设置在第一芯片中,并与第二通孔和第一电路单元连接。 第三电路单元设置在第二芯片中,并与第一通孔连接。 第一电路单元响应于第一控制信号将其输出信号输出到第一通孔和第二电路单元之一。

    CONTENT-PROVIDING METHOD AND SYSTEM
    25.
    发明申请
    CONTENT-PROVIDING METHOD AND SYSTEM 有权
    内容提供方法和系统

    公开(公告)号:US20120136861A1

    公开(公告)日:2012-05-31

    申请号:US13304479

    申请日:2011-11-25

    CPC classification number: G06F17/30702 G06F17/30867

    Abstract: A content-providing method and system, including identifying a representative type cluster by clustering content related to behavioral data which represents a use history of a user, according to type of the content, mapping the representative type cluster to a time interval, and storing the representative type cluster and the time interval.

    Abstract translation: 一种内容提供方法和系统,包括:根据所述内容的类型,将所述代表类型集群映射到时间间隔,通过聚集与表示用户的使用历史的行为数据相关的内容来识别代表性类型集群;以及存储 代表型集群和时间间隔。

    SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME
    28.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME 有权
    半导体器件及其驱动方法

    公开(公告)号:US20110001559A1

    公开(公告)日:2011-01-06

    申请号:US12614672

    申请日:2009-11-09

    Abstract: A semiconductor device and a method for driving the same rapidly detect failure of a through-semiconductor-chip via and effectively repairing the failure using a latching unit assigned to each through-semiconductor-chip via. The semiconductor device includes a plurality of semiconductor chips that are stacked, and a plurality of through-semiconductor-chip vias to commonly transfer a signal to the plurality of semiconductor chips, wherein each of the semiconductor chips includes a multiplicity of latching units assigned to the through-semiconductor-chip vias and the multiplicity of latching units of each of the semiconductor chips constructs a boundary scan path including the plurality of through-semiconductor-chip vias to sequentially transfer test data.

    Abstract translation: 半导体器件及其驱动方法可以快速检测半导体芯片通孔的故障,并使用分配给每个贯通半导体芯片通孔的锁存单元有效地修复故障。 半导体器件包括堆叠的多个半导体芯片,以及多个贯穿半导体芯片通孔,以共同地将信号传递到多个半导体芯片,其中每个半导体芯片包括分配给多个半导体芯片的多个锁存单元 通过半导体芯片通孔,并且每个半导体芯片的多个锁存单元构成包括多个通过半导体芯片通孔的边界扫描路径以顺序地传送测试数据。

    SEMICONDUCTOR DEVICE
    29.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20110001552A1

    公开(公告)日:2011-01-06

    申请号:US12615876

    申请日:2009-11-10

    Abstract: A semiconductor device includes a first transmission line and a second transmission line disposed at different layers; a contact fuse coupled with the first transmission line and the second transmission line; a power driver configured to apply an electric stress to the contact fuse; and a fuse state output unit configured to output a fuse state signal having a logic level corresponding to an electric connection state of the contact fuse.

    Abstract translation: 半导体器件包括:第一传输线和布置在不同层的第二传输线; 与第一传输线和第二传输线耦合的接触熔丝; 功率驱动器,被配置为向所述接触保险丝施加电应力; 以及熔丝状态输出单元,被配置为输出具有与所述接触熔丝的电连接状态对应的逻辑电平的熔丝状态信号。

    Data line termination circuit
    30.
    发明授权
    Data line termination circuit 失效
    数据线终端电路

    公开(公告)号:US07863928B2

    公开(公告)日:2011-01-04

    申请号:US12403549

    申请日:2009-03-13

    CPC classification number: G11C7/1048 G11C11/4096 G11C11/4097

    Abstract: A data line termination circuit includes a swing-width sensing unit configured to sense a swing width of a voltage of a data line and output a sensed signal, and a variable termination unit configured to adjust a termination resistance value of the data line in response to the sensed signal. The swing-width sensing unit can sense if the swing width is less than or greater than a predetermined swing width, and the swing width of the voltage of the data line can be reduced or increased to maintain the voltage of the data line within a predetermined range.

    Abstract translation: 数据线终端电路包括:摆动宽度检测单元,被配置为感测数据线的电压的摆幅并输出感测信号;以及可变终端单元,被配置为响应于所述数据线的终端电阻值 感测信号。 摆幅感测单元可以感测摆动宽度是否小于或大于预定的摆动宽度,并且可以减小或增加数据线的电压的摆动宽度,以将数据线的电压保持在预定的 范围。

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