公开(公告)号：US20120146646A1

公开(公告)日：2012-06-14

申请号：US12964561

申请日：2010-12-09

Applicant: Sasikanth Manipatruni ,  Christopher Judson Hardy

Inventor： Sasikanth Manipatruni ,  Christopher Judson Hardy

IPC: G01R33/20 ,  G05F3/00 ,  H04J14/06

CPC classification number: G01R33/3692 ,  A61B5/0013 ,  A61B5/0017 ,  A61B5/055 ,  A61B6/037 ,  A61B6/56 ,  A61B8/44 ,  A61B8/56 ,  H04J14/0254

Abstract: The present disclosure is directed towards the transmission of data and/or power using nanophotonic elements. For example, in one embodiment, a medical imaging system is provided. The imaging system includes a multiplexed photonic data transfer system having an optical modulator configured to receive an electrical signal representative of a set of data and being operable to modulate a subset of photons defined by time, wavelength, or polarization contained within a beam of light so as to encode the photons with the set of data to produce encoded photons, an optical waveguide interfacing with at least a portion of the optical modulator and configured to transmit the beam of light so as to allow the photons to be modulated by the optical modulator, an optical resonator in communication with the optical waveguide and configured to remove the encoded photons from the beam of light, and a transducer optically connected to the optical resonator and configured to convert the encoded photons into the electrical signal representative of the set of data.

Abstract translation: 本公开涉及使用纳米光子元件传输数据和/或功率。 例如，在一个实施例中，提供了一种医学成像系统。 成像系统包括具有光学调制器的多路复用光子数据传输系统，该光学调制器被配置为接收表示一组数据的电信号，并且可操作地调制由光束包含的时间，波长或偏振所限定的光子子集，因此 为了用该组数据对光子进行编码以产生编码的光子;光波导，与光调制器的至少一部分相连，并被配置为传输光束以允许光子被光调制器调制， 与光波导通信并被配置为从光束中去除编码的光子的光学谐振器，以及光学连接到光学谐振器并被配置为将编码的光子转换成代表该组数据的电信号的换能器。

公开(公告)号：US20110293216A1

公开(公告)日：2011-12-01

申请号：US13049400

申请日：2011-03-16

Applicant: Michal Lipson ,  Sasikanth Manipatruni ,  Kyle Preston ,  Bradley Schmidt

Inventor： Michal Lipson ,  Sasikanth Manipatruni ,  Kyle Preston ,  Bradley Schmidt

IPC: G02B6/12 ,  G02B6/132 ,  G02B6/134 ,  H01L33/58

CPC classification number: G02B6/43 ,  G02B6/12 ,  G02B6/12004 ,  G02B6/12007 ,  G02B6/122 ,  G02B6/13 ,  G02B6/2938 ,  G02F1/025 ,  G02F1/2257 ,  G02F1/3132 ,  G02F2001/0152 ,  G02F2202/06 ,  G02F2202/103 ,  G02F2202/104 ,  G02F2203/15

Abstract: Novel integrated electro-optic structures such as modulators and switches and methods for fabrication of the same are disclosed in a variety of embodiments. In an illustrative embodiment, a device includes a substrate with a waveguide and an optical resonator comprising polycrystalline silicon positioned on the substrate. First and second doped semiconducting regions also comprise polycrystalline silicon and are positioned proximate to the first optical resonator. The first optical resonator is communicatively coupled to the waveguide.

Abstract translation: 诸如调制器和开关的新型集成电光结构及其制造方法在各种实施例中被公开。 在说明性实施例中，器件包括具有波导的衬底和包括位于衬底上的多晶硅的光学谐振器。 第一和第二掺杂半导体区域还包括多晶硅并且被定位成靠近第一光学谐振器。 第一光学谐振器通信地耦合到波导。

公开(公告)号：US20100158426A1

公开(公告)日：2010-06-24

申请号：US12566412

申请日：2009-09-24

Applicant: Sasikanth Manipatruni ,  Michal Lipson

Inventor： Sasikanth Manipatruni ,  Michal Lipson

IPC: G02F1/035

CPC classification number: G02F1/2257 ,  G02F2001/0152 ,  G02F2001/212

Abstract: A doping profile for a modulator facilitates rapidly changing the carrier density in a waveguide. The carrier density change causes rapid changes in the index of refraction of the waveguide. Example modulators include a ring modulator and a Mach Zender modulator. A charge reciprocating section may be provided to control the amount of injected charge.

Abstract translation: 用于调制器的掺杂曲线有助于快速改变波导中的载流子密度。 载流子密度变化引起波导折射率的快速变化。 示例性调制器包括环形调制器和Mach Zender调制器。 可以提供电荷往复部分来控制注入的电荷量。

公开(公告)号：US20230353157A1

公开(公告)日：2023-11-02

申请号：US17733166

申请日：2022-04-29

Applicant: Tanay A. Gosavi ,  Chia-Ching Lin ,  Sasikanth Manipatruni ,  Dmitri Evgenievich Nikonov ,  Ian Alexander Young ,  Ramamoorthy Ramesh ,  Darrell G. Schlom ,  Megan E. Holtz ,  Rachel A. Steinhardt

Inventor： Tanay A. Gosavi ,  Chia-Ching Lin ,  Sasikanth Manipatruni ,  Dmitri Evgenievich Nikonov ,  Ian Alexander Young ,  Ramamoorthy Ramesh ,  Darrell G. Schlom ,  Megan E. Holtz ,  Rachel A. Steinhardt

IPC: H03K19/18 ,  H01L43/10 ,  H01L43/02 ,  H01L27/22

CPC classification number: H03K19/18 ,  H01L43/10 ,  H01L43/02 ,  H01L27/22

Abstract: Magnetoelectric spin-orbit logic (MESO) devices comprise a magnetoelectric switch capacitor coupled to a spin-orbit coupling structure. The logic state of the MESO device is represented by the magnetization orientation of the ferromagnet of the magnetoelectric switch capacitor and the spin-orbit coupling structure converts the magnetization orientation of the ferromagnet to an output current. MESO devices in which all or at least some of the constituent layers of the device are perovskite materials can provide advantages such as improved control over the manufacturing of MESO devices and high quality interfaces between MESO layers due to the lattice matching of perovskite materials.

公开(公告)号：US20200098824A1

公开(公告)日：2020-03-26

申请号：US16142040

申请日：2018-09-26

Applicant: Abhishek SHARMA ,  Gregory K. CHEN ,  Ram KRISHNAMURTHY ,  Ravi PILLARISETTY ,  Sasikanth MANIPATRUNI ,  Amrita MATHURIYA ,  Raghavan KUMAR ,  Phil KNAG ,  Huseyin SUMBUL ,  Urusa ALAAN ,  Noriyuki SATO

Inventor： Abhishek SHARMA ,  Gregory K. CHEN ,  Ram KRISHNAMURTHY ,  Ravi PILLARISETTY ,  Sasikanth MANIPATRUNI ,  Amrita MATHURIYA ,  Raghavan KUMAR ,  Phil KNAG ,  Huseyin SUMBUL ,  Urusa ALAAN ,  Noriyuki SATO

IPC: H01L27/24 ,  H01L45/00

Abstract: Embodiments herein describe techniques for a semiconductor device including a RRAM memory cell. The RRAM memory cell includes a substrate, a RRAM storage cell above the substrate, and a diode adjacent to the RRAM storage cell. The RRAM storage cell includes a first electrode located in a first metal layer above the substrate, a resistive switching material layer adjacent to the first electrode, and a second electrode adjacent to the resistive switching material layer. The second electrode is shared between the RRAM storage cell and the diode. The diode includes the second electrode shared with the RRAM storage cell, a semiconductor layer adjacent to the second electrode, and a third electrode located in a second metal layer above the substrate. Other embodiments may be described and/or claimed.

公开(公告)号：US20190057727A1

公开(公告)日：2019-02-21

申请号：US16160955

申请日：2018-10-15

Applicant: Amrita Mathuriya ,  Sasikanth Manipatruni ,  Victor W. Lee ,  Abhishek Sharma ,  Huseyin E. Sumbul ,  Gregory Chen ,  Raghavan Kumar ,  Phil Knag ,  Ram Krishnamurthy ,  Ian Young

Inventor： Amrita Mathuriya ,  Sasikanth Manipatruni ,  Victor W. Lee ,  Abhishek Sharma ,  Huseyin E. Sumbul ,  Gregory Chen ,  Raghavan Kumar ,  Phil Knag ,  Ram Krishnamurthy ,  Ian Young

IPC: G11C7/10 ,  G11C5/04 ,  G06F12/06

Abstract: Techniques and mechanisms for configuring a memory device to perform a sequence of in-memory computations. In an embodiment, a memory device includes a memory array and circuitry, coupled thereto, to perform data computations based on the data stored at the memory array. Based on instructions received at the memory device, control circuitry is configured to enable an automatic performance of a sequence of operations. In another embodiment, the memory device is coupled in an in-series arrangement of other memory devices to provide a pipeline circuit architecture. The memory devices each function as a respective stage of the pipeline circuit architecture, where the stages each perform respective in-memory computations. Some or all such stages each provide a different respective layer of a neural network.

公开(公告)号：US20190057304A1

公开(公告)日：2019-02-21

申请号：US16160800

申请日：2018-10-15

Applicant: Amrita Mathuriya ,  Sasikanth Manipatruni ,  Victor Lee ,  Huseyin Sumbul ,  Gregory Chen ,  Raghavan Kumar ,  Phil Knag ,  Ram Krishnamurthy ,  IAN YOUNG ,  Abhishek Sharma

Inventor： Amrita Mathuriya ,  Sasikanth Manipatruni ,  Victor Lee ,  Huseyin Sumbul ,  Gregory Chen ,  Raghavan Kumar ,  Phil Knag ,  Ram Krishnamurthy ,  IAN YOUNG ,  Abhishek Sharma

IPC: G06N3/063 ,  G06N3/04

Abstract: The present disclosure is directed to systems and methods of implementing an analog neural network using a pipelined SRAM architecture (“PISA”) circuitry disposed in on-chip processor memory circuitry. The on-chip processor memory circuitry may include processor last level cache (LLC) circuitry. One or more physical parameters, such as a stored charge or voltage, may be used to permit the generation of an in-memory analog output using a SRAM array. The generation of an in-memory analog output using only word-line and bit-line capabilities beneficially increases the computational density of the PISA circuit without increasing power requirements. Thus, the systems and methods described herein beneficially leverage the existing capabilities of on-chip SRAM processor memory circuitry to perform a relatively large number of analog vector/tensor calculations associated with execution of a neural network, such as a recurrent neural network, without burdening the processor circuitry and without significant impact to the processor power requirements.

公开(公告)号：US09389413B2

公开(公告)日：2016-07-12

申请号：US14130967

申请日：2012-07-06

Applicant: Michal Lipson ,  Paul McEuen ,  Arthur Barnard ,  Sasikanth Manipatruni ,  Mian Zhang ,  Gustavo Wiederhecker

Inventor： Michal Lipson ,  Paul McEuen ,  Arthur Barnard ,  Sasikanth Manipatruni ,  Mian Zhang ,  Gustavo Wiederhecker

IPC: G02B26/00 ,  G02B6/26 ,  H01S3/10 ,  H03L7/00 ,  H03H3/007 ,  G02B6/293 ,  H01S3/105 ,  G02F1/01 ,  B82Y10/00 ,  B81B3/00 ,  H03H9/24

CPC classification number: G02B26/002 ,  B81B3/0018 ,  B82Y10/00 ,  G02B6/26 ,  G02B6/29338 ,  G02B26/001 ,  G02F1/011 ,  G02F2203/15 ,  H01S3/105 ,  H03H3/0072 ,  H03H9/2447 ,  H03L7/00

Abstract: A synchronizable optomechanical oscillator (OMO) network including at least two dissimilar silicon nitride (Si3N4) optomechanical resonators that can be excited to evolve into self-sustaining optomechanical oscillators (OMOs) coupled only through an optical radiation field. The tunability of the optical coupling between the oscillators enables one to externally control the dynamics and switch between coupled and individual oscillation states.

Abstract translation: 包括至少两个不同的氮化硅（Si3N4）光机械谐振器的可同步的光机械振荡器（OMO）网络，其可以被激发以演化成仅通过光辐射场耦合的自维持的机电振荡器（OMO）。 振荡器之间的光耦合的可调性使得能够从外部控制动态并在耦合振荡状态和各个振荡状态之间切换。

公开(公告)号：US09195787B2

公开(公告)日：2015-11-24

申请号：US13682358

申请日：2012-11-20

Applicant: Sasikanth Manipatruni ,  Dmitri E. Nikonov ,  Ian A. Young

Inventor： Sasikanth Manipatruni ,  Dmitri E. Nikonov ,  Ian A. Young

IPC: G06F17/50

CPC classification number: G06F17/5036

Abstract: Described are apparatus and method for simulating spintronic integrated circuit (SPINIC), the method comprising: generating a spin netlist indicating connections of spin nodes of spin circuits and nodes of general circuits; and modifying a modified nodal analysis (MNA) matrix for general circuits to generate a spin MNA matrix for solving spin circuits and general circuits of the spin netlist.

Abstract translation: 描述了用于模拟自旋电子集成电路（SPINIC）的装置和方法，所述方法包括：产生指示自旋电路的自旋节点和通用电路节点的连接的自旋网表; 并修改用于通用电路的修改的节点分析（MNA）矩阵以产生用于求解自旋网络的自旋电路和一般电路的自旋MNA矩阵。

公开(公告)号：US09183829B2

公开(公告)日：2015-11-10

申请号：US13725773

申请日：2012-12-21

Applicant: Sasikanth Manipatruni ,  Kelin J. Kuhn ,  Debendra Mallik ,  John C. Johnson

Inventor： Sasikanth Manipatruni ,  Kelin J. Kuhn ,  Debendra Mallik ,  John C. Johnson

IPC: G10K11/34

CPC classification number: G10K11/346 ,  A41D2400/00 ,  H04R1/403 ,  H04R1/406 ,  H04R2201/023 ,  H04R2201/401 ,  H04R2499/11 ,  H04R2499/15

Abstract: A system includes a processor and a phased array, coupled to the processor, having an arrayed waveguide for acoustic waves to enable directional sound communication.

Abstract translation: 系统包括耦合到处理器的处理器和相控阵列，其具有用于声波的阵列波导以实现定向声音通信。