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    Epitaxial template and barrier for the integration of functional thin film metal oxide heterostructures on silicon
    3.
    发明授权
    Epitaxial template and barrier for the integration of functional thin film metal oxide heterostructures on silicon 失效
    外延模板和屏障，用于在硅上整合功能性薄膜金属氧化物异质结构

    公开(公告)号：US06642539B2

    公开(公告)日：2003-11-04

    申请号：US10231401

    申请日：2002-08-29

    申请人： Ramamoorthy Ramesh ,  Darrell G. Schlom

    发明人： Ramamoorthy Ramesh ,  Darrell G. Schlom

    IPC分类号： H01L2912

    CPC分类号： H01L27/11502 ,  G11C11/22 ,  H01L21/28568 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

    摘要： A ferroelectric memory cell formed on a monocrystalline silicon underlayer, either an epitaxial silicon contact plug to a transistor source or drain or silicon gate region for which the memory cell forms a non-volatile gate. A conductive barrier layer of doped strontium titanate, whether cationically substituted, such by lanthanum or niobium for strontium and titanium respectively, or anionically deficient, is epitaxially grown over the silicon, and a lower metal oxide electrode layer, a ferroelectric layer and an upper metal oxide electrode layer are epitaxially grown on the barrier layer. No platinum barrier is needed beneath the ferroelectric stack. The invention can be applied to many other functional oxide materials of the Ruddlesden-Popper and devices including micromachined electromechanical (MEM) devices and ferromagnetic tri-layer devices.

    摘要翻译： 在单晶硅衬底上形成的铁电存储单元，即存储单元形成非易失性栅极的硅晶体管源极或漏极或硅栅极区域的外延硅接触插塞。 掺杂的钛酸锶的导电阻挡层，无论是阳离子取代的，如分别用于锶和钛的镧或铌或阴离子缺陷的导电阻挡层在硅上外延生长，并且下部金属氧化物电极层，铁电层和上部金属 氧化物电极层在阻挡层上外延生长。 铁电堆下方不需要铂金屏障。 本发明可以应用于Ruddlesden-Popper的许多其它功能氧化物材料和包括微加工机电（MEM）器件和铁磁性三层器件的器件。

    Ferroelectric circuit element that can be fabricated at low temperatures and method for making the same
    5.
    发明授权
    Ferroelectric circuit element that can be fabricated at low temperatures and method for making the same 有权
    可在低温下制造的铁电电路元件及其制造方法

    公开(公告)号：US06908802B2

    公开(公告)日：2005-06-21

    申请号：US10377971

    申请日：2003-02-27

    申请人： Ramamoorthy Ramesh

    发明人： Ramamoorthy Ramesh

    IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/115 ,  H01L21/8238

    CPC分类号： H01L27/11502 ,  H01L21/76877 ,  H01L27/10852 ,  H01L27/11507 ,  H01L28/55 ,  H01L28/75

    摘要： A circuit element that includes a ferroelectric device connected to a substrate device. The circuit element is constructed by fabricating the substrate device in a semiconductor substrate and depositing a dielectric layer over the semiconductor substrate. A via is then etched in the dielectric layer to provide access to the substrate device and filled with copper or tungsten. A layer of a conducting metallic oxide is then deposited on the conducting plug, and a layer of ferroelectric material is deposited on the layer of conducting metal oxide. The layer of conducting metallic oxide is deposited at a temperature below 450° C., preferably at room temperature.

    摘要翻译： 一种电路元件，包括连接到衬底器件的铁电体器件。 电路元件通过在半导体衬底中制造衬底器件并在半导体衬底上沉积电介质层来构成。 然后在电介质层中蚀刻通孔以提供对衬底器件的接近并填充有铜或钨。 然后将一层导电金属氧化物沉积在导电插塞上，并且一层铁电材料沉积在导电金属氧化物层上。 导电金属氧化物层在低于450℃的温度下沉积，优选在室温下沉积。

    Amorphous barrier layer in a ferroelectric memory cell
    6.
    发明授权
    Amorphous barrier layer in a ferroelectric memory cell 失效
    铁电存储单元中的无定形阻挡层

    公开(公告)号：US06610549B1

    公开(公告)日：2003-08-26

    申请号：US09709051

    申请日：2000-11-10

    申请人： Sanjeev Aggarwal ,  Ramamoorthy Ramesh

    发明人： Sanjeev Aggarwal ,  Ramamoorthy Ramesh

    IPC分类号： H01L218239

    CPC分类号： H01L21/7687 ,  H01L27/11502 ,  H01L28/55 ,  H01L28/75

    摘要： A ferroelectric cell, particularly one integrated on a silicon substrate, comprising an amorphous barrier layer interposed between the ferroelectric stack and the silicon. Preferably, the ferroelectric stack includes conductive metal oxide electrodes sandwiching the ferroelectric layer. The metal oxide may act as a templating layer to crystallographically orient the ferroelectric layer. Alternatively, the electrodes and ferroelectric layer may be polycrystalline. The amorphous barrier layer may be composed of an intermetallic alloy, such as Ti3Al, a metal-metalloid, such as Pd—Si, a combination of early and later transition metals, such as Ti—Ni, and other related compound metal systems, such as (Ti, Zr)—Be, that form amorphous metals.

    摘要翻译： 特别是集成在硅衬底上的铁电电池，包括介于铁电堆和硅之间的无定形阻挡层。 优选地，铁电体层包括夹着铁电体层的导电金属氧化物电极。 金属氧化物可以用作模板层以使铁电层晶体取向。 或者，电极和铁电层可以是多晶的。 无定形阻挡层可以由诸如Ti 3 Al的金属间合金，诸如Pd-Si的金属 - 准金属，诸如Ti-Ni的早期和稍后的过渡金属的组合以及其它相关的复合金属体系组成，例如 作为（Ti，Zr）-Be，形成无定形金属。

    Methods and structures to cure the effects of hydrogen annealing on ferroelectric capacitors
    7.
    发明授权
    Methods and structures to cure the effects of hydrogen annealing on ferroelectric capacitors 失效
    固化氢退火对铁电电容器的影响的方法和结构

    公开(公告)号：US6115281A

    公开(公告)日：2000-09-05

    申请号：US151903

    申请日：1998-09-11

    申请人： Sanjeev Aggarwal ,  Scott Robert Perusse ,  Ramamoorthy Ramesh

    发明人： Sanjeev Aggarwal ,  Scott Robert Perusse ,  Ramamoorthy Ramesh

    IPC分类号： H01L21/02 ,  H04L12/26 ,  H04L12/56 ,  H04Q11/04 ,  G11C11/22

    CPC分类号： H04Q11/0478 ,  H01L28/55 ,  H01L28/75 ,  H04L49/3081 ,  H04L2012/5636

    摘要： A ferroelectric memory cell integrated with silicon circuitry which require a forming-gas anneal of the silicon circuitry after the ferroelectric stack has been formed. The ferroelectric layer may have a composition such that there is no space in the lattice of the ferroelectric phase to accommodate atomic hydrogen or have a composition with a Curie temperature below the temperature of the forming-gas anneal. Preferably, there is no upper platinum electrode, or it is deposited after the forming-gas anneal. A metal-oxide upper electrode serves as barrier to the forming-gas anneal, and an intermetallic layer positioned above the ferroelectric stack serves as an even better barrier. Forming-gas damage to the ferroelectric stack can be removed by a recovery anneal in a hydrogen-free environment, preferably performed at a temperature above the Curie temperature.

    摘要翻译： 与硅电路集成的铁电存储单元，其在形成铁电叠层之后需要硅电路的成形气体退火。 铁电层可以具有使铁电相的晶格中没有空间以适应原子氢或具有低于成形气体退火温度的居里温度的组成的组成。 优选地，不存在上铂电极，或者在成形气体退火之后沉积。 金属氧化物上电极用作形成气体退火的阻挡层，并且位于铁电堆叠上方的金属间层用作更好的屏障。 铁电堆的形成气体损伤可以通过在无氢环境中的回收退火来去除，优选在高于居里温度的温度下进行。

    Oriented bismuth ferrite films grown on silicon and devices formed thereby
    8.
    发明申请
    Oriented bismuth ferrite films grown on silicon and devices formed thereby 审中-公开
    在硅上生长的定向铋铁氧体膜和由此形成的器件

    公开(公告)号：US20070029592A1

    公开(公告)日：2007-02-08

    申请号：US11197532

    申请日：2005-08-04

    申请人： Ramamoorthy Ramesh

    发明人： Ramamoorthy Ramesh

    IPC分类号： H01L29/94

    CPC分类号： H01L21/02192 ,  B81B3/0018 ,  H01L21/02362 ,  H01L21/31691 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/56

    摘要： A functional perovskite cell formed on a silicon substrate layer and including a functional layer of bismuth ferrite (BiFeO3 or BFO) sandwiched between two electrode layers. An intermediate template layer, for example, of strontium titanate allows the bismuth ferrite layer to be crystallographically aligned with the silicon substrate layer. Other barrier layers of platinum or an intermetallic alloy produce a polycrystalline BFO layer. The cell may be configured as a non-volatile memory cell or a MEMS structure respectively depending upon the ferroelectric and piezoelectric character of BFO. The films may be grown by MOCVD using a heated vaporizer.

    摘要翻译： 形成在硅衬底层上并且包含夹在两个电极层之间的铋铁氧体（BiFeO 3 N 3或BFO）的功能层的功能性钙钛矿电池。 中间模板层例如钛酸锶允许铋铁氧体层与硅衬底层结晶地取向。 铂或金属间化合物的其它阻挡层产生多晶BFO层。 可以根据BFO的铁电和压电特性分别将单元配置为非易失性存储单元或MEMS结构。 可以使用加热蒸发器通过MOCVD生长膜。

    Electrode structure for ferroelectric capacitor integrated on silicon
    10.
    发明授权
    Electrode structure for ferroelectric capacitor integrated on silicon 失效
    集成在硅上的铁电电容器的电极结构

    公开(公告)号：US5798903A

    公开(公告)日：1998-08-25

    申请号：US578499

    申请日：1995-12-26

    申请人： Anil M. Dhote ,  Ramamoorthy Ramesh

    发明人： Anil M. Dhote ,  Ramamoorthy Ramesh

    IPC分类号： H01L27/04 ,  H01G2/06 ,  H01G4/33 ,  H01L21/02 ,  H01L21/285 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01G4/06

    CPC分类号： H01L28/75 ,  H01L21/28568 ,  H01L28/55

    摘要： A ferroelectric capacitor structure and its method of making in which a ferroelectric stack of two metal-oxide electrodes sandwiching a ferroelectric layer is fabricated on a silicon substrate with an intervening barrier layer, preferably of TiN. In one embodiment, a platinum layer is grown between the TiN and the lower metal-oxide electrode at a sufficiently high temperature that provides crystallographically ordered growth of the ferroelectric stack. In another embodiment, the platinum layer was completely eliminated with the lower electrode being grown directly on the TiN. Although the conventional conductive metal-oxide used in the electrode is lanthanum strontium cobalt oxide (LSCO), lanthanum nickel oxide provides good electrical and lifetime characteristics in a ferroelectric cell. Alternatively, the electrodes can be formed of the rock-salt metal oxides, such as neodymium oxide (NdO).

    摘要翻译： 铁硅电容器结构及其制造方法，其中在具有中间阻挡层，优选TiN的硅衬底上制造夹有铁电层的两个金属氧化物电极的铁电堆叠。 在一个实施例中，铂层在TiN和下金属氧化物电极之间以足够高的温度生长，其提供铁电堆叠的晶体学有序生长。 在另一个实施方案中，铂层被完全消除，下电极直接在TiN上生长。 虽然在电极中使用的传统的导电金属氧化物是氧化镧镧氧化钴（LSCO），但是氧化镧镍在铁电体中提供良好的电气和寿命特性。 或者，电极可以由诸如氧化钕（NdO）的岩盐金属氧化物形成。