公开(公告)号：US07599215B2

公开(公告)日：2009-10-06

申请号：US11840051

申请日：2007-08-16

Applicant: Wen-Chin Lin ,  Denny Tang ,  Hsu Chen Cheng

Inventor： Wen-Chin Lin ,  Denny Tang ,  Hsu Chen Cheng

IPC: G11C11/15

CPC classification number: G11C11/16

Abstract: Disclosed herein are toggle-mode magnetoresistive random access memory (MRAM) devices having small-angle toggle write lines, and related methods of toggle-mode switching MRAM devices. Also disclosed are layouts for MRAM devices constructed according to the disclosed principles. Generally speaking, the disclosed principles provide for non-orthogonally aligned toggle-mode write lines used to switch toggle-mode MRAM devices that employ a bias field to decrease the threshold needed to switch the magnetic state of each device. While the conventional toggle-mode write lines provide for the desired orthogonal orientation of the applied magnetic fields to optimize device switching, the use of a bias field affects this orthogonal orientation. By non-orthogonally aligning the two write lines as disclosed herein, the detrimental affect of the bias field may be compensated for such that the net fields applied to the device for both lines are again substantially orthogonal, as is desired.

Abstract translation: 这里公开了具有小角度切换写入线的触发模式磁阻随机存取存储器（MRAM）器件以及触发模式切换MRAM器件的相关方法。 还公开了根据所公开的原理构造的MRAM装置的布局。 一般来说，所公开的原理提供用于切换切换模式MRAM器件的非正交对准的触发模式写入线，其使用偏置场来降低切换每个器件的磁状态所需的阈值。 虽然常规的切换模式写入线提供所施加的磁场的期望的正交取向以优化器件切换，但偏置场的使用影响该正交取向。 如本文所公开的，通过非正交对准这两个写入线，可以补偿偏置场的有害影响，使得如所期望的那样，施加到两条线的器件的净场也基本正交。

公开(公告)号：US07545662B2

公开(公告)日：2009-06-09

申请号：US11089969

申请日：2005-03-25

Applicant: Chao-Hsiung Wang ,  Horng-Huei Tseng ,  Denny Tang ,  Wen-Chin Lin ,  Mark Hsieh

Inventor： Chao-Hsiung Wang ,  Horng-Huei Tseng ,  Denny Tang ,  Wen-Chin Lin ,  Mark Hsieh

IPC: G11C7/02

CPC classification number: G11C11/16 ,  G11C5/025 ,  H01L23/5225 ,  H01L27/222 ,  H01L43/12 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A circuit with an inter-module radiation interference shielding mechanism is disclosed. The circuit includes a circuit module producing a radiation field. At least one radiation shielding module is situated between the circuit module and another module that is vulnerable to the interference of the radiation field. The shielding module is substantially tangential to the radiation field.

Abstract translation: 公开了一种具有模块间辐射干扰屏蔽机构的电路。 电路包括产生辐射场的电路模块。 至少一个辐射屏蔽模块位于电路模块和易受辐射场干扰的另一个模块之间。 屏蔽模块基本上与辐射场相切。

公开(公告)号：US07443638B2

公开(公告)日：2008-10-28

申请号：US10907974

申请日：2005-04-22

Applicant: Yu-Jen Wang ,  Chih-Huang Lai ,  Wen-Chin Lin ,  Denny Tang ,  Chao-Hsiung Wang

Inventor： Yu-Jen Wang ,  Chih-Huang Lai ,  Wen-Chin Lin ,  Denny Tang ,  Chao-Hsiung Wang

IPC: G11B5/39 ,  G11B5/33

CPC classification number: G11B5/3929 ,  B82Y10/00 ,  G11B2005/3996

Abstract: Disclosed herein is a magnetoresistive structure, for example useful as a spin-valve or GMR stack in a magnetic sensor, and a fabrication method thereof. The magnetoresistive structure uses twisted coupling to induce a perpendicular magnetization alignment between the free layer and the pinned layer. Ferromagnetic layers of the free and pinned layers are exchange-coupled using antiferromagnetic layers having substantially parallel exchange-biasing directions. Thus, embodiments can be realized that have antiferromagnetic layers formed of a same material and/or having a same blocking temperature. At least one of the free and pinned layers further includes a second ferromagnetic layer and an insulating layer, such as a NOL, between the two ferromagnetic layers. The insulating layer causes twisted coupling between the two ferromagnetic layers, rotating the magnetization direction of one 90 degrees relative to the magnetization direction of the other.

Abstract translation: 这里公开了一种例如在磁传感器中用作自旋阀或GMR堆叠的磁阻结构及其制造方法。 磁阻结构使用扭转耦合来引起自由层和被钉扎层之间的垂直磁化对准。 使用具有基本平行的交换偏压方向的反铁磁层来交换耦合自由和被钉扎层的铁磁层。 因此，可以实现具有由相同材料形成的反铁磁层和/或具有相同阻挡温度的实施例。 自由和被钉扎层中的至少一个还包括在两个铁磁层之间的第二铁磁层和绝缘层，例如NOL。 绝缘层引起两个铁磁层之间的扭转耦合，使相对于另一个的磁化方向旋转90度的磁化方向。

公开(公告)号：US07205632B2

公开(公告)日：2007-04-17

申请号：US10818009

申请日：2004-04-05

Applicant: Wen-Chin Lin ,  Denny D. Tang ,  Chao-Hsiung Wang

Inventor： Wen-Chin Lin ,  Denny D. Tang ,  Chao-Hsiung Wang

IPC: H01L29/00

CPC classification number: H01L21/263 ,  H01L27/0688 ,  H01L27/08

Abstract: A microelectronics device including a semiconductor device located at least partially over a substrate, a bombarded area located at least partially over the substrate and adjacent the semiconductor device, and a bombarded attenuator interposing the semiconductor device and the bombarded area.

Abstract translation: 一种微电子器件，包括至少部分地位于衬底上的半导体器件，至少部分地位于衬底上并且邻近半导体器件的轰击区域，以及插入半导体器件和被轰击区域的轰击衰减器。

公开(公告)号：US07151271B2

公开(公告)日：2006-12-19

申请号：US10681541

申请日：2003-10-08

Applicant: Chao-Hsiung Wang ,  Denny Tang ,  Wen-Chin Lin ,  Li-Shyue Lai

Inventor： Chao-Hsiung Wang ,  Denny Tang ,  Wen-Chin Lin ,  Li-Shyue Lai

IPC: A61N5/00 ,  G21G5/00

CPC classification number: H01J37/3174 ,  B82Y10/00 ,  B82Y40/00

Abstract: A method and system is disclosed for concentrating high energy particles on a predetermined area on a target semiconductor substrate. A high energy source for generating a predetermined amount of high energy particles, and an electro-magnetic radiation source for generating low energy beams are used together. The system also uses a mask set having at least one mask with at least one alignment area and at least one mask target area thereon, the mask target area passing more high energy particles then any other area of the mask. At least one protection shield is incorporated in the system for protecting the alignment area from being exposed to the high energy particles, wherein the mask is aligned with the predetermined target semiconductor substrate by passing the low energy beams through the alignment area, wherein the high energy particles generated by the high energy source pass through the mask target area to land on the predetermined area on the target semiconductor substrate.

Abstract translation: 公开了一种用于将高能粒子集中在目标半导体衬底上的预定区域上的方法和系统。 用于产生预定量的高能粒子的高能量源和用于产生低能量束的电磁辐射源一起使用。 该系统还使用具有至少一个具有至少一个对准区域和至少一个掩模目标区域的掩模的掩模组，掩模目标区域通过更多的高能粒子，然后通过掩模的任何其它区域。 至少一个保护屏蔽被并入系统中，用于保护对准区域不暴露于高能粒子，其中通过使低能量束通过对准区域，掩模与预定目标半导体衬底对齐，其中高能量 由高能量源产生的粒子通过掩模对象区域落在目标半导体衬底上的预定区域上。

公开(公告)号：US20060183318A1

公开(公告)日：2006-08-17

申请号：US10906357

申请日：2005-02-15

Applicant: Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

Inventor： Yuan-Hung Liu ,  Chih-Ta Wu ,  Lan-Lin Chao ,  Yeur-Luen Tu ,  Wen-Chin Lin ,  Chia-Shiung Tsai

IPC: H01L21/4763 ,  H01L21/00

CPC classification number: H01L43/12 ,  H01L27/228

Abstract: An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.

Abstract translation: 改进的磁阻存储器件具有减小的磁存储元件与用于写入磁存储器元件的导电存储器线之间的距离。 通过根据包括在磁阻存储元件上形成掩模并在掩模层上形成绝缘层，然后使用平坦化处理去除绝缘层的部分的方法，通过形成改进的磁阻存储器件来简化缩短的距离。 然后可以在掩模层中形成导电通孔，例如使用镶嵌工艺。 然后可以在掩模层和导电通孔上形成导电存储器线。

公开(公告)号：US07070490B2

公开(公告)日：2006-07-04

申请号：US10109015

申请日：2002-03-28

Applicant: Tzu-Shin Chen ,  Ming-Hsing Kao ,  Wen-Chin Lin ,  Hua-Bin Chi

Inventor： Tzu-Shin Chen ,  Ming-Hsing Kao ,  Wen-Chin Lin ,  Hua-Bin Chi

IPC: B24B5/00

CPC classification number: B24B37/30 ,  B25B11/005 ,  H01L21/6838

Abstract: A membrane for vacuum suction of a silicon water typically used inside a polishing head. The membrane has a flat main body and a plurality of protrusions each having a spiny shape over the surface of the flat main body. The protrusions are formed in positions that correspond to the holes of a supporting multiple-hole panel. The protrusions on the flat main body lower the suction pressure between the wafer and the membrane somewhat so that wafer unloading failure is minimized.

Abstract translation: 通常用于抛光头内部的硅水的真空抽吸膜。 膜具有扁平主体和多个突起，每个突起在平坦主体的表面上具有多晶形状。 突起形成在与支撑多孔板的孔相对应的位置。 扁平主体上的突起稍微降低了晶片和膜之间的吸入压力，使得晶片卸载故障最小化。

公开(公告)号：US06985383B2

公开(公告)日：2006-01-10

申请号：US10689421

申请日：2003-10-20

Applicant: Denny D. Tang ,  Wen-Chin Lin

Inventor： Denny D. Tang ,  Wen-Chin Lin

IPC: G11C11/14 ,  G11C11/15 ,  G11C7/14

CPC classification number: G11C5/147 ,  G11C11/16 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/5607 ,  G11C2211/5634

Abstract: A multilevel reference generator has a plurality of nonlinear standard resistive elements where each resistive element is biased at a constant level to develop a resultant level. The multilevel reference generator has a plurality of mirror sources. Each mirror source is in communication with the one of the plurality of resistive elements such that each mirror source receives the resultant level from the one standard resistive element and provides a mirrored replication of the resultant level. The multilevel reference generator has a plurality of reference level combining circuits. The reference level combining circuit includes a resultant level summing circuit that additively combines the first and second mirrored replication level and a level scaling circuit to create a scaling of the combined first and second mirrored replication levels to create the reference level.

Abstract translation: 多电平参考发生器具有多个非线性标准电阻元件，其中每个电阻元件被偏置在恒定电平以产生合成电平。 多电平参考发生器具有多个镜源。 每个反射镜源与多个电阻元件中的一个电阻元件相通，使得每个反射镜源从一个标准电阻元件接收合成电平，并提供所得电平的镜像复制。 多电平参考发生器具有多个参考电平组合电路。 参考电平组合电路包括相加地组合第一和第二镜像复制级别的电平求和电路和级别缩放电路，以创建组合的第一和第二镜像复制级别的缩放以创建参考电平。

公开(公告)号：US20050206469A1

公开(公告)日：2005-09-22

申请号：US10804899

申请日：2004-03-19

Applicant: Wen-Chin Lin ,  Denny Tang ,  Li-Shyue Lai ,  Chung-Long Chang ,  Chun-Hon Chen

Inventor： Wen-Chin Lin ,  Denny Tang ,  Li-Shyue Lai ,  Chung-Long Chang ,  Chun-Hon Chen

IPC: H01L23/522 ,  H01P1/36

CPC classification number: H01L23/5223 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A capacitor for use within a microelectronic product employs a first capacitor plate layer that includes a first series of horizontally separated and interconnected tines. A capacitor dielectric layer separates the first capacitor plate layer from a second capacitor plate layer. The second capacitor plate layer includes a second series of horizontally separated and interconnected tines horizontally interdigitated with the first series of horizontally separated and interconnected tines. The capacitor is formed employing a self-aligned method and the capacitor dielectric layer is formed in a serpentine shape.

Abstract translation: 在微电子产品中使用的电容器采用第一电容器板层，其包括第一系列水平分离和互连的尖齿。 电容器电介质层将第一电容器板层与第二电容器板层分开。 第二电容器板层包括与第一系列水平分离和互相联接的齿水平地交叉指向的第二系列水平分离和互连的齿。 使用自对准方法形成电容器，并且电容器介电层形成为蛇形形状。

公开(公告)号：US06909628B2

公开(公告)日：2005-06-21

申请号：US10366498

申请日：2003-02-13

Applicant: Wen-Chin Lin ,  Denny D. Tang ,  Yu Der Chih

Inventor： Wen-Chin Lin ,  Denny D. Tang ,  Yu Der Chih

IPC: G11C11/00 ,  G11C11/15 ,  G11C11/16 ,  H01L43/00 ,  H03K5/02

CPC classification number: G11C11/16

Abstract: A new magnetic RAM cell device is achieved. The device comprises a MTJ cell comprising a free layer and a pinned layer separated by a dielectric layer. A diode is coupled between the free layer and a reading line. A writing switch is coupled between a first end of the pinned layer and a first writing line. A second end of the pinned layer is coupled to a second writing line. Architectures using MRAM cells are disclosed.

Abstract translation: 实现了新的磁性RAM单元装置。 该器件包括MTJ电池，其包括由电介质层分离的自由层和钉扎层。 二极管耦合在自由层和读取线之间。 写入开关耦合在固定层的第一端和第一写入线之间。 固定层的第二端耦合到第二写入线。 公开了使用MRAM单元的架构。