公开(公告)号：US20150127863A1

公开(公告)日：2015-05-07

申请号：US14595062

申请日：2015-01-12

Applicant: Apple Inc.

Inventor： Joseph Sokol, JR. ,  Manoj Radhakrishnan ,  Matthew J. Byom ,  Robert Hoopes ,  Christopher Sarcone

IPC: G06F13/30 ,  G06F13/372 ,  G06F13/37

CPC classification number: G06F13/30 ,  G06F13/18 ,  G06F13/37 ,  G06F13/372

Abstract: Multiple variants of a data processing system, which maintains I/O priority from the time a process makes an I/O request until the hardware services that request, will be described. In one embodiment, a data processing system has one or more processors having one or more processor cores, which execute an operating system and one or more applications of the data processing system. The data processing system also can have one or more non-volatile memory device coupled to the one or more processors to store data of the data processing system, and one or more non-volatile memory controller coupled to the one or more processors. The one or more non-volatile memory controller enables a transfer of data to at least one non-volatile memory device, and the priority level assigned by the operating system is maintained throughout the logical data path of the data processing system.

Abstract translation: 数据处理系统的多个变体，将描述从进程I / O请求直到所请求的硬件服务之前的I / O优先级。 在一个实施例中，数据处理系统具有一个或多个处理器，其具有一个或多个处理器核，其执行操作系统和数据处理系统的一个或多个应用。 数据处理系统还可以具有耦合到一个或多个处理器的一个或多个非易失性存储器设备来存储数据处理系统的数据，以及耦合到该一个或多个处理器的一个或多个非易失性存储器控制器。 一个或多个非易失性存储器控制器使得能够将数据传送到至少一个非易失性存储器设备，并且在数据处理系统的整个逻辑数据路径中保持由操作系统分配的优先级。

公开(公告)号：US08737148B2

公开(公告)日：2014-05-27

申请号：US13833229

申请日：2013-03-15

Applicant: Apple Inc.

Inventor： Matthew J. Byom ,  Daniel J. Post ,  Vadim Khmelnitsky

IPC: G11C29/00

CPC classification number: G06F12/123 ,  G11C16/349 ,  G11C29/42 ,  G11C29/82 ,  G11C29/883 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: Systems and methods are provided for selectively retiring blocks based on refresh events of those blocks. In addition to refresh events, other criteria may be applied in making a decision whether to retire a block. By applying the criteria, the system is able to selectively retire blocks that may otherwise continue to be refreshed.

Abstract translation: 提供了系统和方法，用于基于这些块的刷新事件来选择性地退出块。 除了刷新事件之外，还可以采用其他标准来决定是否退出块。 通过应用标准，系统能够选择性地退出可能会继续刷新的块。

公开(公告)号：US10977119B2

公开(公告)日：2021-04-13

申请号：US16382046

申请日：2019-04-11

Applicant: Apple Inc.

Inventor： Eran Roll ,  Stas Mouler ,  Matthew J. Byom ,  Andrew W. Vogan ,  Muhammad N. Ashraf ,  Elad Harush ,  Roman Guy

IPC: G06F11/00 ,  G06F11/10 ,  G11C29/52 ,  G11C29/04 ,  G11B20/18

Abstract: Disclosed are techniques for managing parity information for data stored on a storage device. A method can be implemented at a computing device communicably coupled to the storage device, and include (1) receiving a request to write data into a data band of the storage device, (2) writing the data into stripes of the data band, comprising, for each stripe of the data band: (i) calculating first parity information for the data written into the stripe, (ii) writing the first parity information into a volatile memory, and (iii) in response to determining that a threshold number of stripes have been written: converting the first parity information into smaller second parity information, and (3) in response to determining that the data band is read-verified: (i) converting the second parity information into smaller third parity information, and (ii) storing the smaller third parity information into a parity band of the storage device.

公开(公告)号：US10133506B2

公开(公告)日：2018-11-20

申请号：US15854299

申请日：2017-12-26

Applicant: Apple Inc.

Inventor： Andrew W. Vogan ,  Charan Srinivasan ,  Matthew J. Byom

IPC: G11C7/04 ,  G06F3/06

Abstract: Systems and methods for managing data in non-volatile memory devices across a large range of operating temperatures are provided. Embodiments discussed herein selectively reprogram previously programmed data at a temperature that better enables the data to be read regardless of where within the range of operating temperatures the data is being read. Circuitry and methods discussed herein can keep track of a program temperature associated with each portion of non-volatile memory and use this information along with other criteria to selectively perform temperature based moves of data. This enables a mechanism for data to programmed in out-of-bounds temperature ranges to be reprogrammed within an in-bounds temperatures range so that a temperature delta between the reprogrammed temperature and the read operation temperature is below a threshold that ensure efficient and error free read operations to be performed.

公开(公告)号：US20180046402A1

公开(公告)日：2018-02-15

申请号：US15232253

申请日：2016-08-09

Applicant: Apple Inc.

Inventor： Andrew W. Vogan ,  Charan Srinivasan ,  Matthew J. Byom

IPC: G06F3/06

CPC classification number: G06F3/0647 ,  G06F3/0619 ,  G06F3/0653 ,  G06F3/0679

Abstract: Systems and methods for managing data in non-volatile memory devices across a large range of operating temperatures are provided. Embodiments discussed herein selectively reprogram previously programmed data at a temperature that better enables the data to be read regardless of where within the range of operating temperatures the data is being read. Circuitry and methods discussed herein can keep track of a program temperature associated with each portion of non-volatile memory and use this information along with other criteria to selectively perform temperature based moves of data. This enables a mechanism for data to programmed in out-of-bounds temperature ranges to be reprogrammed within an in-bounds temperatures range so that a temperature delta between the reprogrammed temperature and the read operation temperature is below a threshold that ensure efficient and error free read operations to be performed.

公开(公告)号：US09891859B1

公开(公告)日：2018-02-13

申请号：US15232253

申请日：2016-08-09

Applicant: Apple Inc.

Inventor： Andrew W. Vogan ,  Charan Srinivasan ,  Matthew J. Byom

IPC: G11C7/04 ,  G06F3/06

CPC classification number: G06F3/0647 ,  G06F3/0619 ,  G06F3/0653 ,  G06F3/0679

Abstract: Systems and methods for managing data in non-volatile memory devices across a large range of operating temperatures are provided. Embodiments discussed herein selectively reprogram previously programmed data at a temperature that better enables the data to be read regardless of where within the range of operating temperatures the data is being read. Circuitry and methods discussed herein can keep track of a program temperature associated with each portion of non-volatile memory and use this information along with other criteria to selectively perform temperature based moves of data. This enables a mechanism for data to programmed in out-of-bounds temperature ranges to be reprogrammed within an in-bounds temperatures range so that a temperature delta between the reprogrammed temperature and the read operation temperature is below a threshold that ensure efficient and error free read operations to be performed.

公开(公告)号：US09841917B2

公开(公告)日：2017-12-12

申请号：US14962339

申请日：2015-12-08

Applicant: Apple Inc.

Inventor： Vadim Khmelnitsky ,  Daniel J. Post ,  Nir Jacob Wakrat ,  Matthew J. Byom ,  Kenneth L. Herman ,  Alexander C. Sanks

IPC: G06F12/02 ,  G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0685 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7206

Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.

公开(公告)号：US20160092110A1

公开(公告)日：2016-03-31

申请号：US14962339

申请日：2015-12-08

Applicant: Apple Inc.

Inventor： Vadim Khmelnitsky ,  Daniel J. Post ,  Nir Jacob Wakrat ,  Matthew J. Byom ,  Kenneth L. Herman ,  Alexander C. Sanks

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0604 ,  G06F3/0685 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7206

Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.

Abstract translation: 公开了用于配置非易失性存储器（“NVM”）的系统和方法。 在一些实施例中，NVM的每个块可以包括可以被编码（例如，游程长度编码）和动态尺寸的块内容表（“TOC”）。 因此，当用户数据被编程到块时，块TOC的大小可以被同时重新计算并且仅在必要时增加。 在一些实施例中，NVM接口可以使用存储在上下文信息中的编织序列和与块的每个页面相关联的至少一个编织序列来确定在系统启动之后跨块的页面是否重播。

公开(公告)号：US20140281588A1

公开(公告)日：2014-09-18

申请号：US14212049

申请日：2014-03-14

Applicant: Apple Inc.

Inventor： Andrew W. Vogan ,  Matthew J. Byom ,  Alexander C. Sanks ,  Daniel J. Post ,  Hari Hara Kumar Maharaj ,  Nir Jacob Wakrat ,  Kenneth L. Herman

IPC: H04L9/08

CPC classification number: G06F21/79 ,  G06F2221/2107

Abstract: Systems and methods are disclosed for generating efficient reads for a system having non-volatile memory (“NVM”). A read command can be separated by a host processor of the system into two phases: a) transmitting a command to a storage processor of the system, where the command is associated with one or more logical addresses, and b) generating data transfer information. The host processor can generate the data transfer information while the storage processor is processing the command from the host processor. Once the data transfer information has been generated and data has been read from the NVM, the data can be transferred.

Abstract translation: 公开了用于为具有非易失性存储器（“NVM”）的系统生成有效读取的系统和方法。 读取命令可以由系统的主机处理器分成两个阶段：a）将命令发送到系统的存储处理器，其中命令与一个或多个逻辑地址相关联，以及b）生成数据传输信息。 主机处理器可以在存储处理器正在处理来自主机处理器的命令时产生数据传输信息。 一旦生成了数据传输信息，并且已经从NVM读取了数据，则可以传送数据。

公开(公告)号：US20140192599A1

公开(公告)日：2014-07-10

申请号：US14204162

申请日：2014-03-11

Applicant: Apple Inc.

Inventor： Matthew J. Byom ,  Nir J. Wakrat ,  Kenneth L. Herman

IPC: G11C16/06

CPC classification number: G11C16/06 ,  G11C16/04 ,  G11C29/08 ,  G11C29/12 ,  G11C2029/1206

Abstract: Systems and methods are provided for testing a non-volatile memory, such as a flash memory. The non-volatile memory may be virtually partitioned into a test region and a general purpose region. A test application may be stored in the general purpose region, and the test application can be executed to run a test of the memory locations in the test region. The results of the test may be stored in the general purpose region. At the completion of the test, the test results may be provided from the general purpose region and displayed to a user. The virtual partitions may be removed prior to shipping the electronic device for distribution.

Abstract translation: 提供了系统和方法来测试诸如闪存之类的非易失性存储器。 非易失性存储器可以被虚拟地分割成测试区域和通用区域。 测试应用可以存储在通用区域中，并且可以执行测试应用以对测试区域中的存储器位置进行测试。 测试结果可以存储在通用区域中。 在测试完成时，测试结果可以从通用区域提供并显示给用户。 虚拟分区可以在运送电子设备以进行分发之前被移除。