公开(公告)号：US06182604B2

公开(公告)日：2001-02-06

申请号：US09427869

申请日：1999-10-27

申请人： Matthew J. Goeckner ,  Ziwei Fang

发明人： Matthew J. Goeckner ,  Ziwei Fang

IPC分类号： C23C1600

CPC分类号： H01J37/32596 ,  C23C14/48 ,  H01J37/34 ,  H01J37/3438

摘要： A plasma doping apparatus includes a hollow cathode to increase throughput and uniformity of ion implantations in a target. The hollow cathode is located adjacent an anode and a target cathode on which a target is placed. An ionizable gas is provided in a space between the anode and the target cathode. The space in which the ionizable gas is provided is surrounded by the hollow cathode. The hollow cathode has either a circular or rectangular cross-section.

摘要翻译： 等离子体掺杂装置包括空心阴极以增加目标中的离子注入的产量和均匀性。 中空阴极位于邻近阳极和放置目标物体的目标阴极。 在阳极和目标阴极之间的空间中提供可电离气体。 可提供可离子化气体的空间被中空阴极包围。 中空阴极具有圆形或矩形横截面。

公开(公告)号：US20130017660A1

公开(公告)日：2013-01-17

申请号：US13183043

申请日：2011-07-14

申请人： Ziwei Fang ,  Ying Zhang ,  Jeff J. Xu

发明人： Ziwei Fang ,  Ying Zhang ,  Jeff J. Xu

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L21/30617 ,  H01L21/26513 ,  H01L21/3065 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7848

摘要： An integrated circuit device and method for manufacturing the integrated circuit device are disclosed. In an example, the method includes forming a gate structure over a substrate; forming a doped region in the substrate; performing a first etching process to remove the doped region and form a trench in the substrate; and performing a second etching process that modifies the trench by removing portions of the substrate.

摘要翻译： 公开了一种用于制造集成电路器件的集成电路器件和方法。 在一个示例中，该方法包括在衬底上形成栅极结构; 在衬底中形成掺杂区域; 执行第一蚀刻工艺以去除掺杂区域并在衬底中形成沟槽; 以及执行通过去除衬底的部分来修改沟槽的第二蚀刻工艺。

公开(公告)号：US06528805B2

公开(公告)日：2003-03-04

申请号：US09916998

申请日：2001-07-27

申请人： Ziwei Fang ,  Matthew Goeckner

发明人： Ziwei Fang ,  Matthew Goeckner

IPC分类号： H01J37244

CPC分类号： H01J37/32412 ,  H01J37/32935 ,  H01J2237/24405 ,  H01J2237/31703

摘要： Plasma doping apparatus includes a plasma doping chamber, a platen mounted in the plasma doping chamber for supporting a workpiece such as a semiconductor wafer, a source of ionizable gas coupled to the chamber, an anode spaced from the platen and a pulse source for applying voltage pulses between the platen and the anode. The voltage pulses produce a plasma having a plasma sheath in the vicinity of the workpiece. The voltage pulses accelerate positive ions across the plasma sheath toward the platen for implantation into the workpiece. The plasma doping apparatus includes at least one Faraday cup positioned adjacent to the platen for collecting a sample of the positive ions accelerated across the plasma sheath. The sample is representative of the dose of positive ions implanted into the workpiece. The Faraday cup may include a multi-aperture cover for reducing the risk of discharge within the interior chamber of the Faraday cup. The Faraday cup may be configured to produce a lateral electric field within the interior chamber for suppressing escape of electrons, thereby improving measurement accuracy.

公开(公告)号：US06335536B1

公开(公告)日：2002-01-01

申请号：US09427872

申请日：1999-10-27

申请人： Matthew J. Goeckner ,  Ziwei Fang

发明人： Matthew J. Goeckner ,  Ziwei Fang

IPC分类号： H01G37317

CPC分类号： H01J37/32412 ,  H01J37/32009

摘要： A pulsed plasma doping system separates the plasma ignition function from the ion implantation function. An ignition voltage pulse is supplied to an ionizable gas and an implantation voltage pulse is applied to the target. The implantation voltage pulse can be generated from the ignition voltage pulse or can be generated separately from the ignition voltage pulse. Ions may be implanted in the target at an energy level that is below the Paschen curve for the system.

摘要翻译： 脉冲等离子体掺杂系统将等离子体点火功能与离子注入功能分离。 将点火电压脉冲提供给可电离气体，并将注入电压脉冲施加到靶。 注入电压脉冲可以从点火电压脉冲产生，也可以与点火电压脉冲分开产生。 离子可以在系统的Paschen曲线以下的能级被植入靶内。

公开(公告)号：US09881840B2

公开(公告)日：2018-01-30

申请号：US13157179

申请日：2011-06-09

申请人： Yu-Lien Huang ,  Ziwei Fang ,  Tsan-Chun Wang ,  Chii-Ming Wu ,  Chun Hsiung Tsai

发明人： Yu-Lien Huang ,  Ziwei Fang ,  Tsan-Chun Wang ,  Chii-Ming Wu ,  Chun Hsiung Tsai

IPC分类号： H01L21/8238 ,  H01L21/3115 ,  H01L21/033 ,  H01L21/3213

CPC分类号： H01L21/823814 ,  H01L21/0337 ,  H01L21/31155 ,  H01L21/32139 ,  H01L21/823807

摘要： A hard mask layer with a limited thickness is formed over a gate electrode layer. A treatment is provided on the hard mask layer to transform the hard mask layer to be more resistant to wet etching solution. A patterning is provided on the treated hard mask layer and the gate electrode to from a gate structure.

公开(公告)号：US08877599B2

公开(公告)日：2014-11-04

申请号：US13471986

申请日：2012-05-15

申请人： Ziwei Fang ,  Tsan-Chun Wang ,  De-Wei Yu

发明人： Ziwei Fang ,  Tsan-Chun Wang ,  De-Wei Yu

IPC分类号： H01L21/33

CPC分类号： H01L29/7848 ,  H01L21/26506 ,  H01L21/26586 ,  H01L21/26593 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7847

摘要： A semiconductor device having dislocations and a method of fabricating the semiconductor device is disclosed. The exemplary semiconductor device and method for fabricating the semiconductor device enhance carrier mobility. The method includes providing a substrate having an isolation feature therein and two gate stacks overlying the substrate, wherein one of the gate stacks is atop the isolation feature. The method further includes performing a pre-amorphous implantation process on the substrate. The method further includes forming a stress film over the substrate. The method also includes performing an annealing process on the substrate and the stress film.

摘要翻译： 公开了一种具有位错的半导体器件和制造半导体器件的方法。 用于制造半导体器件的示例性半导体器件和方法增强载流子迁移率。 该方法包括提供其中具有隔离特性的衬底和覆盖衬底的两个栅极叠层，其中一个栅极堆叠位于隔离特征顶部。 该方法还包括在衬底上执行预非晶体注入工艺。 该方法还包括在衬底上形成应力膜。 该方法还包括对衬底和应力膜进行退火处理。

公开(公告)号：US20130309829A1

公开(公告)日：2013-11-21

申请号：US13471986

申请日：2012-05-15

申请人： Ziwei Fang ,  Tsan-Chun Wang ,  De-Wei Yu

发明人： Ziwei Fang ,  Tsan-Chun Wang ,  De-Wei Yu

IPC分类号： H01L21/336

CPC分类号： H01L29/7848 ,  H01L21/26506 ,  H01L21/26586 ,  H01L21/26593 ,  H01L21/324 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823878 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7847

摘要： A semiconductor device having dislocations and a method of fabricating the semiconductor device is disclosed. The exemplary semiconductor device and method for fabricating the semiconductor device enhance carrier mobility. The method includes providing a substrate having an isolation feature therein and two gate stacks overlying the substrate, wherein one of the gate stacks is atop the isolation feature. The method further includes performing a pre-amorphous implantation process on the substrate. The method further includes forming a stress film over the substrate. The method also includes performing an annealing process on the substrate and the stress film.

摘要翻译： 公开了一种具有位错的半导体器件和制造半导体器件的方法。 用于制造半导体器件的示例性半导体器件和方法增强载流子迁移率。 该方法包括提供其中具有隔离特性的衬底和覆盖衬底的两个栅极叠层，其中一个栅极堆叠位于隔离特征顶部。 该方法还包括在衬底上执行预非晶体注入工艺。 该方法还包括在衬底上形成应力膜。 该方法还包括对衬底和应力膜进行退火处理。

公开(公告)号：US08501570B2

公开(公告)日：2013-08-06

申请号：US12981610

申请日：2010-12-30

申请人： Ziwei Fang ,  Jeff J. Xu ,  Ming-Jie Huang ,  Yimin Huang ,  Zhiqiang Wu ,  Min Cao

发明人： Ziwei Fang ,  Jeff J. Xu ,  Ming-Jie Huang ,  Yimin Huang ,  Zhiqiang Wu ,  Min Cao

IPC分类号： H01L21/02 ,  H01L21/306 ,  H01L29/165 ,  H01L29/66 ,  H01L29/78 ,  H01L21/265

CPC分类号： H01L29/7848 ,  H01L21/02057 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/2658 ,  H01L21/26586 ,  H01L21/30604 ,  H01L21/30608 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/78

摘要： An integrated circuit device and method for manufacturing the integrated circuit device provide improved control over a shape of a trench for forming the source and drain features of integrated circuit device, by forming a second doped region in a first doped region and removing the first and the second doped regions by a first and a second wet etching processes.

摘要翻译： 用于制造集成电路器件的集成电路器件和方法通过在第一掺杂区域中形成第二掺杂区域并且去除第一和第二掺杂区域，从而提供对用于形成集成电路器件的源极和漏极特征的沟槽形状的改进的控制 第二掺杂区域通过第一和第二湿蚀刻工艺。

公开(公告)号：US20060121704A1

公开(公告)日：2006-06-08

申请号：US11005972

申请日：2004-12-07

申请人： Steven Walther ,  Ziwei Fang

发明人： Steven Walther ,  Ziwei Fang

IPC分类号： H01L21/04 ,  C23C16/00

CPC分类号： C23C14/48 ,  H01J37/32412 ,  H01J37/32697 ,  H01L21/2236

摘要： A plasma ion implantation system includes a process chamber, a source for generating a plasma in the process chamber, a platen for holding a substrate in the process chamber, an implant pulse source configured to generate implant pulses for accelerating ions from the plasma into the substrate, and an axial electrostatic confinement structure configured to confine electrons in a direction generally orthogonal to a surface of the platen. The confinement structure may include an auxiliary electrode spaced from the platen and a bias source configured to bias the auxiliary electrode at a negative potential relative to the plasma.

摘要翻译： 等离子体离子注入系统包括处理室，用于在处理室中产生等离子体的源，用于在处理室中保持衬底的压板，配置成产生用于将离子从等离子体加速到衬底中的注入脉冲的注入脉冲源 以及轴向静电限制结构，其构造成在大致正交于压板的表面的方向上限制电子。 限制结构可以包括与压板间隔开的辅助电极和被配置为将辅助电极相对于等离子体偏压成负电位的偏置源。

公开(公告)号：US20050260837A1

公开(公告)日：2005-11-24

申请号：US10852643

申请日：2004-05-24

申请人： Steven Walther ,  Ziwei Fang ,  Justin Tocco ,  Carleton Ellis

发明人： Steven Walther ,  Ziwei Fang ,  Justin Tocco ,  Carleton Ellis

IPC分类号： C23C14/48 ,  H01J37/32 ,  H01L21/223 ,  H01L21/26 ,  H01L21/42

CPC分类号： H01J37/32412 ,  C23C14/48 ,  H01L21/2236

摘要： A method for plasma ion implantation of a substrate includes providing a plasma ion implantation system having a process chamber, a source for producing a plasma in the process chamber, a platen for holding a substrate in the process chamber, an anode spaced from the platen, and a pulse source for generating implant pulses for accelerating ions from the plasma into the substrate. In one aspect, a parameter of an implant process is varied to at least partially compensate for undesired effects of interaction between ions being implanted and the substrate. For example, dose rate, ion energy, or both may be varied during the implant process. In another aspect, a pretreatment step includes accelerating ions from the plasma to the anode to cause emission of secondary electrons from the anode, and accelerating the secondary electrons from the anode to a substrate for pretreatment of the substrate.

摘要翻译： 用于等离子体离子注入衬底的方法包括提供等离子体离子注入系统，其具有处理室，用于在处理室中产生等离子体的源，用于在处理室中保持衬底的压板，与压板隔开的阳极， 以及用于产生用于将离子从等离子体加速到衬底中的注入脉冲的脉冲源。 在一个方面，改变注入过程的参数以至少部分地补偿被植入的离子与衬底之间的相互作用的不期望的影响。 例如，剂量率，离子能量或二者可以在植入过程期间变化。 另一方面，预处理步骤包括将离子从等离子体加速到阳极，以引起来自阳极的二次电子的发射，以及将二次电子从阳极加速至衬底以进行预处理。