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    Interconnect structures containing stress adjustment cap layer
    25.
    发明授权
    Interconnect structures containing stress adjustment cap layer 有权
    互连结构包含应力调整盖层

    公开(公告)号：US06617690B1

    公开(公告)日：2003-09-09

    申请号：US10218292

    申请日：2002-08-14

    申请人： Stephen M. Gates ,  Timothy J. Dalton ,  John A. Fitzsimmons

    发明人： Stephen M. Gates ,  Timothy J. Dalton ,  John A. Fitzsimmons

    IPC分类号： H01L2940

    CPC分类号： H01L23/53295 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Novel interconnect structures possessing a relatively low internal stress and dielectric constant for use in semiconductor devices are provided herein. The novel interconnect structures comprise a first layer having a coefficient of thermal expansion greater than about 20 ppm and a first internal stress associated therewith, the first layer having a first set of metallic lines formed therein; a second layer having a coefficient of thermal expansion less than about 20 ppm and a second internal stress associated therewith, the second layer having a second set of metallic lines formed therein; and one or more stress adjustment cap layers formed between the first layer and the second layer, the cap layer(s) having a third internal stress to offset the first stress of the first layer and the second stress of the second layer and inducing a favorable relief of stress on the interconnect structure. Methods for making a semiconductor device having a substantially reduced internal stress are also provided.

    摘要翻译： 本文提供了具有用于半导体器件的相对低的内应力和介电常数的新型互连结构。 新颖的互连结构包括具有大于约20ppm的热膨胀系数的第一层和与其相关联的第一内部应力，第一层具有形成在其中的第一组金属线; 具有小于约20ppm的热膨胀系数的第二层和与其相关联的第二内应力，所述第二层在其中形成有第二组金属线; 以及形成在所述第一层和所述第二层之间的一个或多个应力调整盖层，所述盖层具有第三内应力以抵消所述第一层的第一应力和所述第二层的所述第二应力，并诱导有利的 减轻互连结构上的应力。 还提供了制造具有显着降低的内部应力的半导体器件的方法。

    METHOD FOR FABRICATING A MICROELECTRONIC CONDUCTOR STRUCTURE
    27.
    发明申请
    METHOD FOR FABRICATING A MICROELECTRONIC CONDUCTOR STRUCTURE 审中-公开
    制造微电子导体结构的方法

    公开(公告)号：US20080160754A1

    公开(公告)日：2008-07-03

    申请号：US11616532

    申请日：2006-12-27

    申请人： John A. Fitzsimmons ,  Stephan Grunow ,  Sanjay C. Mehta ,  Andrew H. Simon ,  Chih-Chao Yang

    发明人： John A. Fitzsimmons ,  Stephan Grunow ,  Sanjay C. Mehta ,  Andrew H. Simon ,  Chih-Chao Yang

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76808 ,  H01L21/02063 ,  H01L21/31144 ,  H01L21/76814

    摘要： A method for fabricating a microelectronic structure includes forming a via aperture through a dielectric layer located over a substrate having a conductor layer therein, to expose the conductor layer. The conductor layer typically comprises a copper containing material. The method also includes etching the conductor layer to form a recessed conductor layer prior to etching a trench aperture within the dielectric layer. The trench aperture is typically contiguous with the via aperture to form a dual damascene aperture. By etching the conductor layer after forming the via aperture and before forming the trench aperture, such a dual damascene aperture is formed with enhanced dimensional integrity.

    摘要翻译： 一种制造微电子结构的方法包括：通过位于其中具有导体层的衬底上的电介质层形成通孔，以露出导体层。 导体层通常包含含铜材料。 该方法还包括在蚀刻介电层内的沟槽孔之前蚀刻导体层以形成凹陷的导体层。 沟槽孔通常与通孔邻接以形成双镶嵌孔。 通过在形成通孔之后蚀刻导体层，并且在形成沟槽孔之前，形成具有增强的尺寸完整性的这种双镶嵌孔。

    SIDEWALLS OF ELECTROPLATED COPPER INTERCONNECTS
    30.
    发明申请
    SIDEWALLS OF ELECTROPLATED COPPER INTERCONNECTS 有权
    电镀铜互连的边界

    公开(公告)号：US20130334691A1

    公开(公告)日：2013-12-19

    申请号：US13525823

    申请日：2012-06-18

    申请人： Mukta G. Farooq ,  John A. Fitzsimmons ,  Troy L. Graves-Abe

    发明人： Mukta G. Farooq ,  John A. Fitzsimmons ,  Troy L. Graves-Abe

    IPC分类号： H01L23/52 ,  H01L21/283

    CPC分类号： H05K3/423 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76858 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/53209 ,  H01L23/53214 ,  H01L23/53238 ,  H01L23/53242 ,  H01L23/53257 ,  H01L2924/0002 ,  Y10T428/12764 ,  H01L2924/00

    摘要： A structure formed in an opening having a substantially vertical sidewall defined by a non-metallic material and having a substantially horizontal bottom defined by a conductive pad, the structure including a diffusion barrier covering the sidewall and a fill composed of conductive material. The structure including a first intermetallic compound separating the diffusion barrier from the conductive material, the first intermetallic compound comprises an alloying material and the conductive material, and is mechanically bound to the conductive material, the alloying material is at least one of the materials selected from the group of chromium, tin, nickel, magnesium, cobalt, aluminum, manganese, titanium, zirconium, indium, palladium, and silver; and a first high friction interface located between the diffusion barrier and the first intermetallic compound and parallel to the sidewall of the opening, wherein the first high friction interface results in a mechanical bond between the diffusion barrier and the first intermetallic compound.

    摘要翻译： 一种形成在开口中的结构，其具有由非金属材料限定的基本上垂直的侧壁，并且具有由导电垫限定的基本上水平的底部，该结构包括覆盖侧壁的扩散阻挡层和由导电材料构成的填充物。 所述结构包括将所述扩散阻挡物与所述导电材料分离的第一金属间化合物，所述第一金属间化合物包括合金材料和所述导电材料，并且机械地结合到所述导电材料上，所述合金材料是选自以下的至少一种材料： 铬，锡，镍，镁，钴，铝，锰，钛，锆，铟，钯和银的组合; 以及位于所述扩散阻挡层和所述第一金属间化合物之间且平行于所述开口的侧壁的第一高摩擦界面，其中所述第一高摩擦界面导致所述扩散阻挡层和所述第一金属间化合物之间的机械结合。