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98 条记录 (耗时 0.026 秒)

    Semiconductor circuit configuration
    21.
    发明授权
    Semiconductor circuit configuration 失效
    半导体电路配置

    公开(公告)号：US06480044B2

    公开(公告)日：2002-11-12

    申请号：US09804322

    申请日：2001-03-12

    申请人： Georg Braun ,  Heinz Hönigschmid ,  Kurt Hoffmann ,  Oskar Kowarik

    发明人： Georg Braun ,  Heinz Hönigschmid ,  Kurt Hoffmann ,  Oskar Kowarik

    IPC分类号： H03K300

    CPC分类号： G11C16/08 ,  G11C8/10

    摘要： A semiconductor circuit is disclosed which contains a driving circuit which is integrated into a semiconductor substrate of a first conductivity type and includes positive voltage switching transistors for switching positive and/or zero voltage levels and negative switching transistors for switching negative and/or zero voltage levels. In addition, the driving circuit contains a control circuit which is positioned upstream from the driving circuit and is also embodied in the semiconductor substrate, which is connected to a substrate voltage. A negative voltage switching transistor of the driving circuit is configured inside an outer well which is embedded in the semiconductor substrate and is of a second conductivity type which is opposite to the first, and the outer well is connected to a supply voltage.

    摘要翻译： 公开了一种半导体电路，其包含集成到第一导电类型的半导体衬底中的驱动电路，并且包括用于切换正和/或零电压电平的正电压开关晶体管和用于切换负和/或零电压电平的负开关晶体管 。 此外，驱动电路包括位于驱动电路上游的控制电路，并且还被配置在连接到衬底电压的半导体衬底中。 驱动电路的负电压开关晶体管被配置在嵌入在半导体衬底中的外部阱中，并且是与第一导电类型相反的第二导电类型，并且外部阱连接到电源电压。

    Configuration for self-referencing ferroelectric memory cells
    23.
    发明授权
    Configuration for self-referencing ferroelectric memory cells 失效
    自参考铁电存储器单元的配置

    公开(公告)号：US06317356B1

    公开(公告)日：2001-11-13

    申请号：US09693764

    申请日：2000-10-20

    申请人： Kurt Hoffmann ,  Oskar Kowarik

    发明人： Kurt Hoffmann ,  Oskar Kowarik

    IPC分类号： G11C1122

    CPC分类号： G11C11/22

    摘要： A configuration for self-referencing a ferroelectric memory cell reads out the ferroelectric memory cell successively while a bit line is precharged to two different, opposing voltages. The voltage values read out from the ferroelectric memory cell are temporarily stored respectively in a first and a second capacitor and then fed to an evaluator circuit.

    摘要翻译： 用于自参考铁电存储器单元的配置在位线被预充电到两个不同的相对电压的同时连续地读出铁电存储单元。 从铁电存储单元读出的电压值分别临时存储在第一和第二电容器中，然后馈送到评估器电路。

    Housing arrangement for an external rotar driven lubricating pump
    25.
    发明授权
    Housing arrangement for an external rotar driven lubricating pump 失效
    外转子驱动润滑泵的外壳装置

    公开(公告)号：US5823750A

    公开(公告)日：1998-10-20

    申请号：US561927

    申请日：1995-11-22

    申请人： Kurt Hoffmann ,  Franz Maucher

    发明人： Kurt Hoffmann ,  Franz Maucher

    IPC分类号： F04C2/10 ,  F16N13/20

    CPC分类号： F04C2/102

    摘要： An external-rotor-driven lubricating pump comprising a lubricant guidance part including a suction port, an outer wall, a carrier section, a discharge port, a lubricant feed space disposed between the carrier section and the outer wall and connected with the suction port, with a lubricant delivery space disposed between the carrier section and the outer wall and connected with the discharge port, and a pump part including a drive gear, an internally-toothed external rotor, with an externally-toothed internal rotor having one tooth less than the number of teeth on the external rotor, the external rotor and the internal rotor upon meshing pumping the lubricant from the lubricant feed space into the lubricant delivery space, with a shaft supporting the drive gear in the carrier section, the drive gear being fixed to the external rotor, the drive gear forming together with the external rotor the outer closure of the lubricating pump at its pump part end, with the internal rotor being mounted loosely on a collar of the carrier section.

    摘要翻译： 一种外转子驱动的润滑泵，其包括润滑引导部，该润滑引导部包括吸入口，外壁，载体部，排出口，配置在载体部与外壁之间并与吸入口连接的润滑剂供给空间， 具有设置在载体部分和外壁之间并与排出口连接的润滑剂输送空间，以及泵部件，其包括驱动齿轮，内齿外转子，外齿形内转子具有小于 在外部转子上的齿数，外部转子和内部转子在啮合时将润滑剂从润滑剂供给空间泵送到润滑剂输送空间中，轴在支架部分中支撑驱动齿轮，驱动齿轮固定到 外部转子，驱动齿轮与外部转子一起形成润滑泵在其泵部分端部的外部封闭件，内部转子安装 宽松地放在承运人部分的衣领上。

    CMOS band gap reference circuit
    27.
    发明授权
    CMOS band gap reference circuit 失效
    CMOS BAND GAP REFERENCE CIRCUIT

    公开(公告)号：US5229710A

    公开(公告)日：1993-07-20

    申请号：US769200

    申请日：1991-09-30

    申请人： Rainer Kraus ,  Kurt Hoffmann

    发明人： Rainer Kraus ,  Kurt Hoffmann

    IPC分类号： G05F3/30 ,  H01L21/70

    CPC分类号： G05F3/30 ,  H01L2924/0002

    摘要： A band gap reference circuit configuration includes first and second bipolar transistors having base-to-emitter voltages. An emitter resistor is connected to the first bipolar transistor. An operational amplifier is connected to the bipolar transistors for processing a difference generated between the base-to-emitter voltages of the first and second bipolar transistors to generate a largely temperature-independent reference voltage. The bipolar transistors are parasitic transistors, and the operational amplifier is constructed in MOS technology.

    摘要翻译： 带隙参考电路配置包括具有基极 - 发射极电压的第一和第二双极晶体管。 发射极电阻连接到第一双极晶体管。 运算放大器连接到双极晶体管，用于处理在第一和第二双极晶体管的基极到发射极之间产生的差异，以产生很大程度上与温度无关的参考电压。 双极型晶体管是寄生晶体管，运算放大器采用MOS技术构成。

    Circuit configuration and a method for the testing of storage cells
    28.
    发明授权
    Circuit configuration and a method for the testing of storage cells 失效
    电路配置和存储单元测试方法

    公开(公告)号：US4896322A

    公开(公告)日：1990-01-23

    申请号：US168676

    申请日：1988-03-16

    申请人： Rainer Kraus ,  Oskar Kowarik ,  Kurt Hoffmann ,  Manfred Paul

    发明人： Rainer Kraus ,  Oskar Kowarik ,  Kurt Hoffmann ,  Manfred Paul

    IPC分类号： G11C29/00 ,  G11C11/401 ,  G11C29/34 ,  G11C29/36 ,  G11C29/38

    CPC分类号： G11C29/38 ,  G11C29/36

    摘要： In a circuit configuration and a method for testing storage cells, all of the bit lines lead to one pair of fault lines which is first precharged with mutually-complementary logic levels. All of the storage cells of a word line are always read-out in parallel relative to one another. In the event of "no fault" the pair of fault lines retains its logic states, whereas in the case of a fault one of the fault lines changes its logic state through switching transistors. This is recognized and analyzed by a comparator circuit in the form of an XOR-circuit or an XNOR-circuit.

    摘要翻译： 在用于测试存储单元的电路配置和方法中，所有位线都导致一对故障线，其首先被预充电互补的逻辑电平。 字线的所有存储单元总是相对于彼此并行读出。 在“无故障”的情况下，该对故障线保持其逻辑状态，而在故障的情况下，故障线之一通过开关晶体管改变其逻辑状态。 这是由XOR电路或XNOR电路形式的比较器电路识别和分析的。

    Semiconductor circuit with a circuit part controlled by a substrate bias
    30.
    发明授权
    Semiconductor circuit with a circuit part controlled by a substrate bias 失效
    具有由衬底偏置控制的电路部分的半导体电路

    公开(公告)号：US4454431A

    公开(公告)日：1984-06-12

    申请号：US240197

    申请日：1981-03-03

    申请人： Kurt Hoffmann ,  Dieter Kantz

    发明人： Kurt Hoffmann ,  Dieter Kantz

    IPC分类号： G11C11/407 ,  G05F3/20 ,  G11C11/34 ,  H01L21/822 ,  H01L27/04 ,  H01L27/10 ,  H03K17/22 ,  H03K17/06 ,  H03K17/10

    CPC分类号： G05F3/205

    摘要： A semiconductor circuit assembly having capacitively controlled field effect transistors, includes a semiconductor chip containing a digital circuit part for supplying timing pulses for controlling operation of the digital circuit part, and terminal having at least one conductive connection to the digital circuit part and the timing pulse generator for supplying potentials thereto from a direct current source. An oscillator is provided and a substrate-bias generator connected to the oscillator and the timing pulse generator. The substrate-bias generator is controlled by the oscillator for producing a bias voltage able to reach a given full value and for activating the timing pulse generator only after the substrate bias voltage has reached its full value.

    摘要翻译： 具有电容控制的场效应晶体管的半导体电路组件包括：半导体芯片，其包含用于提供用于控制数字电路部分的操作的定时脉冲的数字电路部分，以及具有至少一个与数字电路部分的导通连接的定时脉冲和定时脉冲 发电机，用于从直流电源向其提供电位。 提供一个振荡器，一个连接到振荡器和定时脉冲发生器的衬底偏置发生器。 衬底偏置发生器由振荡器控制，用于产生能够达到给定全值的偏置电压，并且仅在衬底偏置电压达到其全部值之后激活定时脉冲发生器。