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公开(公告)号：US08330158B2
公开(公告)日：2012-12-11
申请号：US12949314
申请日：2010-11-18
Applicant: Fabrice Marinet
Inventor： Fabrice Marinet
IPC: H01L23/58
CPC classification number: H01L23/544 , H01L2223/5444 , H01L2924/0002 , H01L2924/00
Abstract: The generation of a chip identifier supporting at least one integrated circuit, which includes providing a cutout of at least one conductive path by cutting the chip, the position of the cutting line relative to the chip conditioning the identifier.
Abstract translation: 产生支持至少一个集成电路的芯片标识符，其包括通过切割芯片提供至少一个导电路径的切口，切割线相对于芯片的位置调节该标识符。
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22.发明申请公开(公告)号：US20120131533A1
公开(公告)日：2012-05-24
申请号：US13299267
申请日：2011-11-17
Applicant: Fabrice Marinet
Inventor： Fabrice Marinet
IPC: G06F17/50
CPC classification number: H01L27/0203 , G06F17/505 , G06F17/5081 , G06F2217/02 , G06F2217/12 , G06F2217/66 , Y02P90/265
Abstract: The disclosure relates to a method of fabricating an integrated circuit on a semiconductor chip, the method comprising: designing an architecture of the integrated circuit comprising at least first and second standard cells implementing a same basic function; designing for the standard cell at least first and second cell layouts presenting random differences; designing an integrated circuit layout corresponding to the integrated circuit architecture; fabricating the integrated circuit according to the integrated circuit layout; using the first cell layout to implement the first standard cell in the integrated circuit layout; and using the second cell layout to implement the second standard cell in the integrated circuit layout. The method can be used for protection of an integrated circuit against reverse engineering.
Abstract translation: 本公开涉及一种在半导体芯片上制造集成电路的方法，该方法包括：设计集成电路的架构，该集成电路至少包括实现相同基本功能的第一和第二标准单元; 设计标准单元至少具有随机差异的第一和第二单元布局; 设计对应于集成电路架构的集成电路布局; 根据集成电路布局制造集成电路; 使用第一单元布局来实现集成电路布局中的第一标准单元; 并且使用第二单元布局来实现集成电路布局中的第二标准单元。 该方法可用于保护集成电路免遭逆向工程。
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公开(公告)号：US08041950B2
公开(公告)日：2011-10-18
申请号：US12731808
申请日：2010-03-25
Applicant: Fabrice Marinet , Alexandre Malherbe
Inventor： Fabrice Marinet , Alexandre Malherbe
IPC: H04L9/00 , H01L27/088 , G06F21/00
CPC classification number: G06F7/588 , G06K19/073 , G06K19/07363 , H03K3/84
Abstract: A random signal generator uses a folded MOS transistor, whose drain-source current includes a random component, as an electronic noise source. The random signal generator generates a random binary signal from the random component. The invention may be applied, in particular, to smart cards.
Abstract translation: 随机信号发生器使用其漏源电流包括随机分量的折叠MOS晶体管作为电子噪声源。 随机信号发生器从随机分量生成随机二进制信号。 本发明特别可以应用于智能卡。
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公开(公告)号：US20110170691A1
公开(公告)日：2011-07-14
申请号：US12917779
申请日：2010-11-02
Applicant: Pierre-Yvan Liardet , Fabrice Marinet , Jérôme Tournemille
Inventor： Pierre-Yvan Liardet , Fabrice Marinet , Jérôme Tournemille
IPC: H04L9/00
CPC classification number: H04L9/004 , H04L9/0625 , H04L2209/046 , H04L2209/125
Abstract: A method for protecting a key implemented, by an electronic circuit, in a symmetrical algorithm for ciphering or deciphering a message, including the steps of: selecting in non-deterministic fashion a pair of different masks from a set of at least four different masks, the masks having the property of representing different bit combinations, at least by pairs of bits; executing the algorithm twice by applying, to the key or to the message, one of the masks of the selected pair at each execution; checking the consistency between the two executions.
Abstract translation: 一种用于保护由电子电路实现的用于加密或解密消息的对称算法的密钥的方法，包括以下步骤：从一组至少四个不同掩码中选择一对不同的掩码， 所述掩模具有表示不同位组合的属性，至少由位组成; 在每次执行时将所选择的一个掩码中的一个应用于密钥或者消息来执行算法两次; 检查两个执行之间的一致性。
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公开(公告)号：US07915141B2
公开(公告)日：2011-03-29
申请号：US12559682
申请日：2009-09-15
Applicant: Fabrice Marinet
Inventor： Fabrice Marinet
IPC: H01L21/00
CPC classification number: H01L23/544 , H01L2223/5444 , H01L2223/5446 , H01L2924/0002 , Y10S438/975 , H01L2924/00
Abstract: The generation of an identification number of a chip supporting at least one integrated circuit, including the step of causing a cutting of at least one conductive section by cutting of the chip among several first conductive sections parallel to one another and perpendicular to at least one edge of the chip, the first sections being individually connected, by at least one of their ends, to the chip, and exhibiting different lengths, the position of the cutting line with respect to the chip edge conditioning the identification number.
Abstract translation: 产生支持至少一个集成电路的芯片的识别号，包括通过在彼此平行的并且垂直于至少一个边缘的多个第一导电部分中切割芯片来切割至少一个导电部分的步骤 芯片的第一部分通过其至少一个端部分别连接到芯片并呈现不同的长度，切割线相对于芯片边缘的位置调节识别号码。
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Patent Agency Ranking
公开(公告)号：US20100059766A1
公开(公告)日：2010-03-11
申请号：US12538336
申请日：2009-08-10
Applicant: Pascal Fornara , Fabrice Marinet
Inventor： Pascal Fornara , Fabrice Marinet
IPC: H01L29/788 , H01L21/768
CPC classification number: H01L27/101 , G11C17/16 , H01L27/105 , H01L27/115 , H01L27/11521
Abstract: An integrated circuit including a substrate of a semiconductor material and first metal portions of a first metallization level or of a first via level defining pixels of an image. The pixels are distributed in first pixels, for each of which the first metal portion is connected to the substrate, and in second pixels, for each of which the first metal portion is separated from the substrate by at least one insulating portion.
Abstract translation: 一种集成电路，包括半导体材料的衬底和第一金属化级的第一金属部分或限定图像像素的第一通孔级。 像素分布在第一像素中，其中第一金属部分连接到基板，并且在第二像素中，其中第一金属部分通过至少一个绝缘部分与基板分离。
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公开(公告)号：US08781124B2
公开(公告)日：2014-07-15
申请号：US12917779
申请日：2010-11-02
Applicant: Pierre-Yvan Liardet , Fabrice Marinet , Jérôme Tournemille
Inventor： Pierre-Yvan Liardet , Fabrice Marinet , Jérôme Tournemille
CPC classification number: H04L9/004 , H04L9/0625 , H04L2209/046 , H04L2209/125
Abstract: A method for protecting a key implemented, by an electronic circuit, in a symmetrical algorithm for ciphering or deciphering a message, including the steps of: selecting in non-deterministic fashion a pair of different masks from a set of at least four different masks, the masks having the property of representing different bit combinations, at least by pairs of bits; executing the algorithm twice by applying, to the key or to the message, one of the masks of the selected pair at each execution; checking the consistency between the two executions.
Abstract translation: 一种用于保护由电子电路实现的用于加密或解密消息的对称算法的密钥的方法，包括以下步骤：从一组至少四个不同掩码中选择一对不同的掩码， 所述掩模具有表示不同位组合的属性，至少由位组成; 在每次执行时将所选择的一个掩码中的一个应用于密钥或者消息来执行算法两次; 检查两个执行之间的一致性。
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公开(公告)号：US08745107B2
公开(公告)日：2014-06-03
申请号：US11663571
申请日：2005-09-27
Applicant: Luc Wuidart , Fabrice Marinet
Inventor： Luc Wuidart , Fabrice Marinet
CPC classification number: G06K19/07372 , G06F21/75 , G06K19/073 , G06K19/07363 , G06K19/07716 , G06Q20/3558 , G07F7/1008 , H01L27/0203
Abstract: A method for protecting an integrated circuit. According to the method, the start-up of all, or part, of the circuit is determined in the presence of a key which is recorded in a non-volatile manner in the circuit, following the production thereof, and depends on at least one first parameter which is present in a non-volatile manner in the circuit after the production thereof.
Abstract translation: 一种用于保护集成电路的方法。 根据该方法，电路的全部或部分的启动是在存在按照非易失性方式记录在电路中的密钥之后确定的，并且依赖于至少一个 第一参数在其生产之后在电路中以非易失性方式存在。
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29.发明授权Countermeasure method and device for protecting against a fault injection attack by detection of a well voltage crossing a threshold 有权通过检测跨越阈值的井电压来防止故障注入攻击的对策方法和装置公开(公告)号：US08564364B2
公开(公告)日：2013-10-22
申请号：US13071325
申请日：2011-03-24
Applicant: Fabrice Marinet , Mathieu Lisart
Inventor： Fabrice Marinet , Mathieu Lisart
CPC classification number: G06F1/26 , G06F21/72 , G06K19/07309 , H01L21/76224 , H01L23/576 , H01L2924/0002 , H03K3/84 , H03K19/003 , H04L9/004 , H04L2209/12 , Y10T29/49155 , H01L2924/00
Abstract: A method for detecting an attack in an electronic microcircuit comprises: forming the microcircuit in a substrate, forming in the substrate a first well electrically isolated from the substrate, by a second well and an embedded well, forming in the first and second wells a data processing circuit comprising a ground terminal formed in the first well and a power supply terminal formed in the second well, and activating a detection signal when a voltage at the ground or power supply terminal of the data processing circuit crosses a threshold voltage.
Abstract translation: 一种用于检测电子微电路中的攻击的方法，包括：在衬底中形成微电路，在衬底中形成与衬底电隔离的第一阱，由第二阱和嵌入阱形成第一阱和第二阱中的数据 处理电路，包括形成在第一阱中的接地端子和形成在第二阱中的电源端子，并且当数据处理电路的接地或电源端子处的电压超过阈值电压时激活检测信号。
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公开(公告)号：US20130011944A1
公开(公告)日：2013-01-10
申请号：US13615104
申请日：2012-09-13
Applicant: Pascal Fornara , Fabrice Marinet
Inventor： Pascal Fornara , Fabrice Marinet
IPC: H01L33/08
CPC classification number: H01L27/101 , G11C17/16 , H01L27/105 , H01L27/115 , H01L27/11521
Abstract: An integrated circuit including a substrate of a semiconductor material and first metal portions of a first metallization level or of a first via level defining pixels of an image. The pixels are distributed in first pixels, for each of which the first metal portion is connected to the substrate, and in second pixels, for each of which the first metal portion is separated from the substrate by at least one insulating portion.
Abstract translation: 一种集成电路，包括半导体材料的衬底和第一金属化级的第一金属部分或限定图像像素的第一通孔级。 像素分布在第一像素中，其中第一金属部分连接到基板，并且在第二像素中，其中第一金属部分通过至少一个绝缘部分与基板分离。
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