公开(公告)号：US20160071930A1

公开(公告)日：2016-03-10

申请号：US14477096

申请日：2014-09-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Steven Bentley ,  Richard A. Farrell ,  Gerard Schmid ,  Ajey Poovannummoottil Jacob

IPC: H01L29/06 ,  H01L29/78 ,  H01L21/3105 ,  H01L21/306 ,  H01L21/308

CPC classification number: H01L29/0676 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/3086 ,  H01L21/31144 ,  H01L29/0649 ,  H01L29/068 ,  H01L29/66439 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/7851 ,  H01L29/7854

Abstract: A method includes forming a first directed self-assembly material above a substrate. The substrate is patterned using the first directed self-assembly material to define at least one fin in the semiconductor substrate. A second directed self-assembly material is formed above the at least one fin to expose a top surface of the at least one fin. A substantially vertical nanowire is formed on the top surface of the at least one fin. At least a first dimension of the vertical nanowire is defined by an intrinsic pitch of the first directed self-assembly material and a second dimension of the vertical nanowire is defined by an intrinsic pitch of the second directed self-assembly material.

Abstract translation: 一种方法包括在基底上形成第一定向自组装材料。 使用第一定向自组装材料对衬底进行构图，以限定半导体衬底中的至少一个鳍。 第二定向自组装材料形成在至少一个翅片上方以暴露至少一个翅片的顶表面。 在至少一个翅片的顶表面上形成基本垂直的纳米线。 垂直纳米线的至少第一尺寸由第一定向自组装材料的固有间距限定，并且垂直纳米线的第二尺寸由第二定向自组装材料的固有间距限定。

公开(公告)号：US20160071845A1

公开(公告)日：2016-03-10

申请号：US14476879

申请日：2014-09-04

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Steven Bentley ,  Richard A. Farrell ,  Gerard Schmid ,  Ajey Poovannummoottil Jacob

IPC: H01L27/088 ,  H01L29/06 ,  H01L21/311 ,  H01L21/308 ,  H01L21/306 ,  H01L29/78 ,  H01L21/8234

CPC classification number: H01L21/31144 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/3086 ,  H01L21/823487 ,  H01L29/0649 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/66439 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/7851 ,  H01L29/7854

Abstract: A method includes forming at least one fin on a semiconductor substrate. A hard mask layer is formed above the fin. A first directed self-assembly material is formed above the hard mask layer. The hard mask layer is patterned using a portion of the first directed self-assembly material as an etch mask to expose a portion of the top surface of the fin. A substantially vertical nanowire is formed on the exposed top surface. At least one dimension of the substantially vertical nanowire is defined by an intrinsic pitch of the first directed self-assembly material.

Abstract translation: 一种方法包括在半导体衬底上形成至少一个翅片。 在翅片上形成硬掩模层。 第一定向自组装材料形成在硬掩模层之上。 使用第一定向自组装材料的一部分作为蚀刻掩模对硬掩模层进行图案化，以暴露鳍的顶表面的一部分。 在暴露的顶表面上形成基本垂直的纳米线。 基本垂直的纳米线的至少一个维度由第一定向自组装材料的固有间距限定。

公开(公告)号：US08906802B2

公开(公告)日：2014-12-09

申请号：US13839284

申请日：2013-03-15

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jeremy A. Wahl ,  Gerard M. Schmid ,  Richard A. Farrell ,  Chanro Park

IPC: H01L21/00 ,  G03C5/00 ,  H01L21/308

CPC classification number: H01L21/31144 ,  H01L21/0337 ,  H01L21/76816

Abstract: One illustrative method disclosed herein includes the steps of performing a directed self-assembly process to form a DSA masking layer, performing at least one process operation to remove at least one of the features of the DSA masking layer so as to thereby define a patterned DSA masking layer with a DSA masking pattern, performing at least one process operation to form a patterned transfer masking layer having a transfer masking pattern comprised of a plurality of features that define a plurality of openings in the transfer masking layer, wherein the transfer masking pattern is the inverse of the DSA masking pattern, and performing at least one etching process through the patterned transfer masking layer on a layer of material to form a plurality of trench/via features in the layer of material.

Abstract translation: 本文公开的一种说明性方法包括以下步骤：执行定向自组装过程以形成DSA掩模层，执行至少一个处理操作以去除DSA掩模层的至少一个特征，从而限定图案化DSA 具有DSA掩模图案的掩模层，执行至少一个处理操作以形成图案化的传输掩蔽层，其具有由在传送掩蔽层中限定多个开口的多个特征组成的传输掩蔽图案，其中传输掩蔽图案是 DSA掩模图案的反向，并且通过在材料层上的图案化转印掩模层进行至少一个蚀刻工艺以在材料层中形成多个沟槽/通孔特征。

公开(公告)号：US20140273511A1

公开(公告)日：2014-09-18

申请号：US13841694

申请日：2013-03-15

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Richard A. Farrell ,  Gerard M. Schmid ,  xU Ji

IPC: H01L21/033

CPC classification number: H01L21/0337 ,  B81C1/00031 ,  B81C2201/0149 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/0271 ,  H01L21/0276

Abstract: Methods for creating chemical guide patterns by DSA lithography for fabricating an integrated circuit are provided. In one example, an integrated circuit includes forming a bifunctional brush layer of a polymeric material overlying an anti-reflective coating on a semiconductor substrate. The polymeric material has a neutral polymeric block portion and a pinning polymeric block portion that are coupled together. The bifunctional brush layer includes a neutral layer that is formed of the neutral polymeric block portion and a pinning layer that is formed of the pinning polymeric block portion. A portion of the neutral layer or the pinning layer is selectively removed to define a chemical guide pattern. A block copolymer layer is deposited overlying the chemical guide pattern. The block copolymer layer is phase separated to define a nanopattern that is registered to the chemical guide pattern.

Abstract translation: 提供了通过DSA光刻产生化学引导图案以制造集成电路的方法。 在一个示例中，集成电路包括形成覆盖半导体衬底上的抗反射涂层的聚合材料的双功能刷层。 聚合物材料具有中性聚合物嵌段部分和联结在一起的钉扎聚合物嵌段部分。 双功能刷层包括由中性聚合物嵌段部分形成的中性层和由钉扎聚合物嵌段部分形成的钉扎层。 选择性地去除中性层或钉扎层的一部分以限定化学引导图案。 沉积在化学引导图案上的嵌段共聚物层。 嵌段共聚物层被相分离以限定与化学引导图案对应的纳米图案。

公开(公告)号：US20140273469A1

公开(公告)日：2014-09-18

申请号：US13839284

申请日：2013-03-15

Applicant: GLOBALFOUNDRIES INC

Inventor： Jeremy A. Wahl ,  Gerard M. Schmid ,  Richard A. Farrell ,  Chanro Park

IPC: H01L21/308

CPC classification number: H01L21/31144 ,  H01L21/0337 ,  H01L21/76816

Abstract: One illustrative method disclosed herein includes the steps of performing a directed self-assembly process to form a DSA masking layer, performing at least one process operation to remove at least one of the features of the DSA masking layer so as to thereby define a patterned DSA masking layer with a DSA masking pattern, performing at least one process operation to form a patterned transfer masking layer having a transfer masking pattern comprised of a plurality of features that define a plurality of openings in the transfer masking layer, wherein the transfer masking pattern is the inverse of the DSA masking pattern, and performing at least one etching process through the patterned transfer masking layer on a layer of material to form a plurality of trench/via features in the layer of material.

Abstract translation: 本文公开的一种说明性方法包括以下步骤：执行定向自组装过程以形成DSA掩模层，执行至少一个处理操作以去除DSA掩模层的至少一个特征，从而限定图案化DSA 具有DSA掩模图案的掩模层，执行至少一个处理操作以形成图案化的传输掩蔽层，其具有由在传送掩蔽层中限定多个开口的多个特征组成的传输掩蔽图案，其中传输掩蔽图案是 DSA掩模图案的反向，并且通过在材料层上的图案化转印掩模层进行至少一个蚀刻工艺以在材料层中形成多个沟槽/通孔特征。

公开(公告)号：US20140178824A1

公开(公告)日：2014-06-26

申请号：US13726732

申请日：2012-12-26

Applicant: GLOBALFOUNDRIES INC.

Inventor： Moshe E Preil ,  Gerard M. Schmid ,  Richard A. Farrell ,  Ji Xu ,  Thomas I. Wallow

IPC: G03F7/20

CPC classification number: G03F7/0002

Abstract: Approaches for utilizing laser annealing to optimize lithographic processes such as directed self assembly (DSA) are provided. Under a typical approach, a substrate (e.g., a wafer) will be subjected to a lithographic process (e.g., having a set of stages/phases, aspects, etc.) such as DSA. Before or during such process, a set of laser annealing passes/scans will be made over the substrate to optimize one or more of the stages. In addition, the substrate could be subjected to additional processes such as hotplate annealing, etc. Still yet, in making a series of laser annealing passes, the techniques utilized and/or beam characteristics of each pass could be varied to further optimize the results.

Abstract translation: 提供了利用激光退火优化光刻工艺的方法，如定向自组装（DSA）。 在典型的方法下，衬底（例如，晶片）将经历诸如DSA的光刻工艺（例如，具有一组阶段/阶段，方面等）。 在此过程之前或期间，将在衬底上进行一组激光退火通过/扫描以优化一个或多个阶段。 此外，可以对基板进行额外的加工，例如热板退火等。然而，在进行一系列激光退火过程中，可以改变所使用的技术和/或每个通过的光束特性以进一步优化结果。