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    Semiconductor substrate process using an optically writable carbon-containing mask
    22.
    发明授权
    Semiconductor substrate process using an optically writable carbon-containing mask 有权
    使用可光学写入的含碳掩模的半导体衬底工艺

    公开(公告)号：US07429532B2

    公开(公告)日：2008-09-30

    申请号：US11199592

    申请日：2005-08-08

    申请人： Kartik Ramaswamy ,  Hiroji Hanawa ,  Biagio Gallo ,  Kenneth S. Collins ,  Kai Ma ,  Vijay Parihar ,  Dean Jennings ,  Abhilash J. Mayur ,  Amir Al-Bayati ,  Andrew Nguyen

    发明人： Kartik Ramaswamy ,  Hiroji Hanawa ,  Biagio Gallo ,  Kenneth S. Collins ,  Kai Ma ,  Vijay Parihar ,  Dean Jennings ,  Abhilash J. Mayur ,  Amir Al-Bayati ,  Andrew Nguyen

    IPC分类号： H01L21/302

    CPC分类号： H01L21/0332 ,  G03F1/54 ,  G03F1/68 ,  G03F7/202 ,  H01L21/3081 ,  H01L21/3086

    摘要： A method of processing a thin film structure on a semiconductor substrate using an optically writable mask, the method includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be exposed to a light source in accordance with a predetermined pattern, depositing an optically writable carbon-containing mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, (c) coupling RF plasma bias power or bias voltage to the workpiece. The method further includes optically writing on the carbon-containing mask layer in accordance with the predetermined pattern with writing light of a characteristic suitable for transforming the transparency or opacity of the optically writable mask layer and exposing through the mask layer the target layer with reading light of a characteristic different from that of the writing light.

    摘要翻译： 一种使用光学可写掩模在半导体衬底上处理薄膜结构的方法，所述方法包括将衬底放置在反应室中，所述衬底在其表面上具有根据预定的暴露于光源的靶层 （a）将含碳工艺气体引入所述室中，（b）在可折入路径中产生可重入环形的RF等离子体电流，所述折返路径包括位于所述腔内的过程区域 通过将等离子体RF源功率耦合到可折入路径的外部部分，（c）将RF等离子体偏置功率或偏置电压耦合到工件。 该方法还包括根据预定图案，用适合于转换光学可写掩膜层的透明度或不透明度的特性的光进行光学写入，并通过掩模层曝光目标层与读取光 具有与书写光不同的特征。

    Copper conductor annealing process employing high speed optical annealing with a low temperature-deposited optical absorber layer
    23.
    发明授权
    Copper conductor annealing process employing high speed optical annealing with a low temperature-deposited optical absorber layer 有权
    铜导体退火工艺采用低温沉积光吸收层进行高速光学退火

    公开(公告)号：US07335611B2

    公开(公告)日：2008-02-26

    申请号：US11199572

    申请日：2005-08-08

    申请人： Kartik Ramaswamy ,  Hiroji Hanawa ,  Biagio Gallo ,  Kenneth S. Collins ,  Kai Ma ,  Vijay Parihar ,  Dean Jennings ,  Abhilash J. Mayur ,  Amir Al-Bayati ,  Andrew Nguyen

    发明人： Kartik Ramaswamy ,  Hiroji Hanawa ,  Biagio Gallo ,  Kenneth S. Collins ,  Kai Ma ,  Vijay Parihar ,  Dean Jennings ,  Abhilash J. Mayur ,  Amir Al-Bayati ,  Andrew Nguyen

    IPC分类号： H01L21/4763 ,  H01L21/00

    CPC分类号： B23K26/0738 ,  B23K26/0608 ,  B23K26/0876 ,  B23K26/361 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/50 ,  H01L21/76843 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76886

    摘要： A method of forming a conductor in a thin film structure on a semiconductor substrate includes forming high aspect ratio openings in a base layer having vertical side walls, depositing a dielectric barrier layer comprising a dielectric compound of a barrier metal on the surfaces of the high aspect ratio openings including the vertical side walls, depositing a metal barrier layer comprising the barrier metal on the first barrier layer, depositing a main conductor species seed layer on the metal barrier layer and depositing a main conductor layer. The method further includes annealing the main conductor layer by (a) directing light from an array of continuous wave lasers into a line of light extending at least partially across the thin film structure, and (b) translating the line of light relative to the thin film structure in a direction transverse to the line of light. The method of Claim 1 further comprising, prior to the annealing step, depositing an amorphous carbon optical absorber layer on the main conductor layer. The step of depositing an amorphous carbon optical absorber layer includes introducing a carbon-containing process gas into a reactor chamber containing the substrate in a process zone of the reactor, applying RF source power to an external reentrant conduit of the reactor to generate a reentrant toroidal RF plasma current passing through the process zone and applying a bias voltage to the substrate.

    摘要翻译： 在半导体衬底上形成薄膜结构中的导体的方法包括在具有垂直侧壁的基底层中形成高纵横比的开口，在高方面的表面上沉积包含阻挡金属的电介质化合物的介电阻挡层 比例开口，包括垂直侧壁，在第一阻挡层上沉积包括阻挡金属的金属阻挡层，在金属阻挡层上沉积主导体种子种子层并沉积主导体层。 该方法还包括通过以下步骤来退火主导体层：（a）将来自连续波激光器阵列的光引导到至少部分穿过薄膜结构的光线，以及（b）相对于薄的平面 薄膜结构在横向于光线的方向上。 2.根据权利要求1所述的方法，还包括在所述退火步骤之前，在所述主导体层上沉积无定形碳光吸收层。 沉积无定形碳光吸收层的步骤包括将含碳工艺气体引入反应器的反应器室中，该反应器室在反应器的工艺区域中，将RF源功率施加到反应器的外部折入导管以产生可重入环形 RF等离子体电流通过工艺区域并向衬底施加偏置电压。

    Silicon-on-insulator wafer transfer method using surface activation plasma immersion ion implantation for wafer-to-wafer adhesion enhancement
    26.
    发明授权
    Silicon-on-insulator wafer transfer method using surface activation plasma immersion ion implantation for wafer-to-wafer adhesion enhancement 失效
    使用表面激活等离子体浸入离子注入的晶体硅晶片转移方法，用于晶片到晶片粘附增强

    公开(公告)号：US07183177B2

    公开(公告)日：2007-02-27

    申请号：US10989993

    申请日：2004-11-16

    申请人： Amir Al-Bayati ,  Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

    发明人： Amir Al-Bayati ,  Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

    IPC分类号： H01L21/46 ,  H01L21/30

    CPC分类号： H01L21/76254 ,  C23C14/48 ,  C23C16/507 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32357 ,  H01J37/32412 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/31604 ,  H01L21/318 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L29/6659

    摘要： A method of fabricating a semiconductor-on-insulator structure from a pair of semiconductor wafers, includes forming an oxide layer on at least a first surface of a first one of the wafers and performing a bonding enhancement implantation step by ion implantation of a first species in the first surface of at least either of the pair of wafers. The method further includes performing a cleavage ion implantation step on one of the pair of wafers by ion implanting a second species to define a cleavage plane across a diameter of the wafer at the predetermined depth below the top surface of the one wafer. The wafers are then bonded together by placing the first surfaces of the pair of wafers onto one another so as to form an semiconductor-on-insulator structure. The method also includes separating the one wafer along the cleavage plane so as to remove a portion of the one wafer between the second surface and the cleavage plane, whereby to form an exposed cleaved surface of a remaining portion of the one wafer on the semiconductor-on-insulator structure. Finally, the cleaved surface is smoothed, preferably by carrying out a low energy high momentum ion implantation step.

    摘要翻译： 一种从一对半导体晶片制造绝缘体上半导体结构的方法包括在第一晶片的至少第一表面上形成氧化物层，并通过离子注入第一种类进行结合增强注入步骤 在所述一对晶片中的至少一个的第一表面中。 所述方法还包括通过离子注入第二种类来在所述一对晶片之一上执行切割离子注入步骤，以在所述晶片的顶部表面下方的预定深度处限定跨所述晶片的直径的解理面。 然后通过将一对晶片的第一表面放置在彼此上而将晶片结合在一起，以形成绝缘体上半导体结构。 该方法还包括沿着解理平面分离一个晶片，以便去除第二表面和解理面之间的一个晶片的一部分，从而形成半导体芯片上的一个晶片的剩余部分的暴露的切割表面， 绝缘体上的结构。 最后，优选通过进行低能量的高动量离子注入步骤来平滑切割的表面。

    Plasma immersion ion implantation apparatus including a plasma source having low dissociation and low minimum plasma voltage
    28.
    发明授权
    Plasma immersion ion implantation apparatus including a plasma source having low dissociation and low minimum plasma voltage 失效
    等离子体浸入式离子注入装置，其包括具有低离解性和低最小等离子体电压的等离子体源

    公开(公告)号：US07137354B2

    公开(公告)日：2006-11-21

    申请号：US10646458

    申请日：2003-08-22

    申请人： Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo ,  Gonzalo Antonio Monroy

    发明人： Kenneth S. Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Andrew Nguyen ,  Amir Al-Bayati ,  Biagio Gallo ,  Gonzalo Antonio Monroy

    IPC分类号： G23C16/00 ,  C23F1/00

    CPC分类号： H01J37/32082 ,  H01J37/321

    摘要： A plasma immersion ion implantation reactor for ion implanting a species into a surface layer of a workpiece includes an enclosure which has a side wall and a ceiling defining a chamber and a workpiece support pedestal within the chamber having a workpiece support surface facing the ceiling and defining a process region extending generally across the wafer support pedestal and confined laterally by the side wall and axially between the workpiece support pedestal and the ceiling. The enclosure has at least a first pair of openings at generally opposite sides of the process region and a first hollow conduit outside of the chamber having first and second ends connected to respective ones of the first pair of openings, so as to provide a first reentrant path extending through the conduit and across said process region. A gas distribution apparatus is provided on or near an interior surface of the reactor for introducing a process gas containing the species to be ion implanted and a first RE plasma source power applicator for generating a plasma in the chamber.

    摘要翻译： 用于将物质离子注入到工件的表面层中的等离子体浸没离子注入反应器包括具有侧壁和限定腔室的天花板的壳体，以及腔室内的工件支撑基座，其具有面向天花板的工件支撑表面并且限定 大致横跨晶片支撑基座延伸并由侧壁横向限制并且在工件支撑基座和天花板之间轴向延伸的过程区域。 外壳在工艺区域的大致相对侧具有至少第一对开口，在腔室外部具有第一和第二端，第一和第二端连接到第一对开口中的相应开口，以便提供第一凹槽 路径延伸穿过导管并穿过所述过程区域。 气体分配装置设置在反应器的内表面上或附近，用于引入含有要离子注入的物质的处理气体和用于在室中产生等离子体的第一RE等离子体源功率施加器。

    Semiconductor on insulator vertical transistor fabrication and doping process
    29.
    发明申请
    Semiconductor on insulator vertical transistor fabrication and doping process 有权
    半导体绝缘体垂直晶体管的制造和掺杂过程

    公开(公告)号：US20080044960A1

    公开(公告)日：2008-02-21

    申请号：US11901969

    申请日：2007-09-18

    申请人： Amir Al-Bayati ,  Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

    发明人： Amir Al-Bayati ,  Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

    IPC分类号： H01L21/84

    CPC分类号： H01J37/321 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/7843 ,  H01L29/785 ,  H01L29/78618

    摘要： A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.

    摘要翻译： 通过绝缘体上半导体结构中的三维垂直晶体管的垂直和水平表面进行保形掺杂的工艺采用RF振荡环形等离子体电流来执行保形离子注入或含掺杂剂膜的共形沉积 然后可以加热以将掺杂剂驱动到晶体管中。 一些实施例采用包含掺杂剂的膜的共形离子注入和共形沉积，并且在其中含掺杂剂的膜是纯掺杂剂的那些实施例中，可以同时执行离子注入和膜沉积。

    Semiconductor substrate process using an optically writable carbon-containing mask
    30.
    发明申请
    Semiconductor substrate process using an optically writable carbon-containing mask 有权
    使用可光学写入的含碳掩模的半导体衬底工艺

    公开(公告)号：US20070032082A1

    公开(公告)日：2007-02-08

    申请号：US11199592

    申请日：2005-08-08

    申请人： Kartik Ramaswamy ,  Hiroji Hanawa ,  Biagio Gallo ,  Kenneth Collins ,  Kai Ma ,  Vijay Parihar ,  Dean Jennings ,  Abhilash Mayur ,  Amir Al-Bayati ,  Andrew Nguyen

    发明人： Kartik Ramaswamy ,  Hiroji Hanawa ,  Biagio Gallo ,  Kenneth Collins ,  Kai Ma ,  Vijay Parihar ,  Dean Jennings ,  Abhilash Mayur ,  Amir Al-Bayati ,  Andrew Nguyen

    IPC分类号： H01L21/302

    CPC分类号： H01L21/0332 ,  G03F1/54 ,  G03F1/68 ,  G03F7/202 ,  H01L21/3081 ,  H01L21/3086

    摘要： A method of processing a thin film structure on a semiconductor substrate using an optically writable mask, the method includes placing the substrate in a reactor chamber, the substrate having on its surface a target layer to be exposed to a light source in accordance with a predetermined pattern, depositing an optically writable carbon-containing mask layer on the substrate by (a) introducing a carbon-containing process gas into the chamber, (b) generating a reentrant toroidal RF plasma current in a reentrant path that includes a process zone overlying the workpiece by coupling plasma RF source power to an external portion of the reentrant path, (c) coupling RF plasma bias power or bias voltage to the workpiece. The method further includes optically writing on the carbon-containing mask layer in accordance with the predetermined pattern with writing light of a characteristic suitable for transforming the transparency or opacity of the optically writable mask layer and exposing through the mask layer the target layer with reading light of a characteristic different from that of the writing light.

    摘要翻译： 一种使用光学可写掩模在半导体衬底上处理薄膜结构的方法，所述方法包括将衬底放置在反应室中，所述衬底在其表面上具有根据预定的暴露于光源的靶层 （a）将含碳工艺气体引入所述室中，（b）在可折入路径中产生可重入环形的RF等离子体电流，所述折返路径包括位于所述腔内的过程区域 通过将等离子体RF源功率耦合到可折入路径的外部部分，（c）将RF等离子体偏置功率或偏置电压耦合到工件。 该方法还包括根据预定图案，用适合于转换光学可写掩膜层的透明度或不透明度的特性的光进行光学写入，并通过掩模层曝光目标层与读取光 具有与书写光不同的特征。