公开(公告)号：US20110050821A1

公开(公告)日：2011-03-03

申请号：US12861070

申请日：2010-08-23

申请人： Hiroyuki KOBAYASHI

发明人： Hiroyuki KOBAYASHI

IPC分类号： B41J2/175

CPC分类号： B41J2/17563 ,  B41J2/17509

摘要： A liquid ejecting head includes a head body that has a nozzle opening for ejecting liquid supplied via a liquid supply path. A first supply member for the liquid supply path has an introduction port for introducing the liquid. A second supply member is positioned on a downstream side of the first supply member. A filter between the first and second supply members crosses the liquid supply path. An integrated molding portion fixes the first and second supply members by resin in a state where the filter is pinched between the first and second supply members. The first and second supply members have pinching portions for pinching the filter therebetween. A wall surface is positioned on one of the first and second supply members and between the filter and the resin to surround an outer periphery of the filter.

摘要翻译： 液体喷射头包括具有用于喷射通过液体供应路径供应的液体的喷嘴开口的喷头主体。 用于液体供应路径的第一供应构件具有用于引入液体的引入口。 第二供给部件位于第一供给部件的下游侧。 第一和第二供应构件之间的过滤器穿过液体供应路径。 一体化成型部在过滤器被夹在第一和第二供给部件之间的状态下，用树脂固定第一供给部件和第二供给部件。 第一和第二供应构件具有用于在其间夹持过滤器的夹持部分。 壁表面位于第一和第二供应构件中的一个上，并且位于过滤器和树脂之间以围绕过滤器的外围。

公开(公告)号：US20100110810A1

公开(公告)日：2010-05-06

申请号：US12683198

申请日：2010-01-06

申请人： Hiroyuki KOBAYASHI

发明人： Hiroyuki KOBAYASHI

IPC分类号： G11C29/00 ,  G11C7/00 ,  G11C8/00

CPC分类号： G11C29/24 ,  G11C11/406 ,  G11C11/40615 ,  G11C29/783 ,  G11C2029/1202

摘要： A semiconductor memory device includes a memory cell array including primary word lines and one or more redundant word lines, a timing signal generating circuit configured to generate a refresh timing signal comprised of a series of pulses arranged at constant intervals, and a refresh-target selecting circuit configured to successively select all the primary word lines and all the one or more redundant word lines one by one in response to the respective pulses of the refresh timing signal, wherein a refresh operation is performed with respect to the word lines that are successively selected by the refresh-target selecting circuit.

摘要翻译： 一种半导体存储器件，包括：一个包括主字线和一个或多个冗余字线的存储单元阵列;定时信号产生电路，被配置为产生一组刷新定时信号，所述刷新定时信号包括以恒定间隔布置的一系列脉冲，以及刷新目标选择 电路，其被配置为响应于所述刷新定时信号的各个脉冲依次选择所有主字线和所有所述一个或多个冗余字线，其中针对连续选择的字线执行刷新操作 通过刷新目标选择电路。

公开(公告)号：US20100071211A1

公开(公告)日：2010-03-25

申请号：US12561932

申请日：2009-09-17

申请人： Hiroyuki KOBAYASHI ,  Hiroshige OWAKI

发明人： Hiroyuki KOBAYASHI ,  Hiroshige OWAKI

IPC分类号： B21D53/76

CPC分类号： B41J2/17563 ,  B41J2/161 ,  B41J2/1637 ,  Y10T29/49401

摘要： A method of manufacturing a liquid ejecting head that ejects a liquid supplied from a liquid storing member through a liquid supply path. The method includes positioning a filter to a first or second supply member by using positioning pins upon disposing the filter between first and second liquid supply paths. The first supply member has the first liquid supply path. The second supply member has the second liquid supply path on the side of one surface of the first supply member to communicate with the first liquid supply path. At least the first supply member and the second supply member are integrated such that a fixed portion is molded by injecting a resin material from an injection portion of a mold at a position where the first and second liquid supply paths are interposed between the positioning pins.

摘要翻译： 一种液体喷射头的制造方法，其通过液体供给路径喷射从液体容纳部件供给的液体。 该方法包括在第一和第二液体供应路径之间设置过滤器时通过使用定位销来将过滤器定位到第一或第二供应构件。 第一供应构件具有第一液体供应路径。 第二供应构件具有在第一供应构件的一个表面侧上的第二液体供应路径，以与第一液体供应路径连通。 至少第一供应构件和第二供应构件被一体化，使得通过在第一和第二液体供应路径插入在定位销之间的位置处从模具的注射部分注入树脂材料来模制固定部分。

公开(公告)号：US20090040849A1

公开(公告)日：2009-02-12

申请号：US12127161

申请日：2008-05-27

申请人： Kaoru MORI ,  Jun OHNO ,  Hiroyuki KOBAYASHI

发明人： Kaoru MORI ,  Jun OHNO ,  Hiroyuki KOBAYASHI

IPC分类号： G11C7/00 ,  G11C8/00

CPC分类号： G11C29/26 ,  G11C7/1045 ,  G11C11/401 ,  G11C29/02 ,  G11C29/025 ,  G11C2029/5006 ,  G11C2029/5602

摘要： Each program circuit outputs an operating specification signal indicating a first or second operating specification according to a program state. Each specification changing circuit is set by a corresponding block selection signal and outputs an operating specification signal indicating a second operating specification. Each timing control circuit changes an output timing of a precharge control signal for a bit line according to the operating specification signal. By the operating specification signal from the specification changing circuit, a failure can be detected in each memory block before programming a program circuit. Thereafter, the failure can be relieved by the program circuit. The output timing of the precharge control signal can be set for each memory block by a block selection signal without wiring a dedicated signal line for setting each specification changing circuit. Accordingly, increase in chip size can be minimized.

摘要翻译： 每个程序电路根据程序状态输出指示第一或第二操作规范的操作规范信号。 每个规格改变电路由相应的块选择信号设置，并输出指示第二操作规范的操作指定信号。 每个定时控制电路根据操作指定信号改变位线的预充电控制信号的输出定时。 通过来自规范改变电路的操作规范信号，在对程序电路进行编程之前可以在每个存储器块中检测到故障。 此后，程序电路可以解除故障。 可以通过块选择信号为每个存储器块设置预充电控制信号的输出定时，而不布线用于设置每个规格改变电路的专用信号线。 因此，可以使芯片尺寸的增加最小化。

公开(公告)号：US20100142250A1

公开(公告)日：2010-06-10

申请号：US12684502

申请日：2010-01-08

申请人： Hiroyuki KOBAYASHI ,  Daisuke KITAYAMA

发明人： Hiroyuki KOBAYASHI ,  Daisuke KITAYAMA

IPC分类号： G11C5/06 ,  G11C8/00 ,  G11C29/00

CPC分类号： G11C29/48 ,  G11C11/401 ,  G11C29/1201 ,  G11C2029/1806

摘要： A pair of access control circuits having bit line pairs wired corresponds to a same data terminal and is assigned different addresses. During a test mode, a data swap circuit prohibits swapping of connections between a pair of data terminals and a pair of data lines when one of the access control circuits is used, and swaps the connections between a pair of data terminals and a pair of data lines when the other one of the access control circuits is used. Accordingly, it is possible to give a data signal at the same logic level to bit lines with different logics from each other. Stress can be given between a contact arranged between a pair of the access control circuits and bit lines adjacent to both sides of the contact. Consequently, designing of a test pattern can be simplified, and test efficiency can be improved.

摘要翻译： 具有布线对的一对访问控制电路对应于相同的数据终端并被分配不同的地址。 在测试模式期间，当使用访问控制电路之一时，数据交换电路禁止一对数据终端和一对数据线之间的连接的交换，并且交换一对数据终端与一对数据之间的连接 当使用另一个访问控制电路时的线路。 因此，可以将具有相同逻辑电平的数据信号与具有不同逻辑的位线相互给出。 可以在布置在一对访问控制电路之间的接触件和与接触件的两侧相邻的位线之间施加应力。 因此，可以简化测试图案的设计，可以提高测试效率。

公开(公告)号：US20100091594A1

公开(公告)日：2010-04-15

申请号：US12641469

申请日：2009-12-18

申请人： Hiroyuki KOBAYASHI

发明人： Hiroyuki KOBAYASHI

IPC分类号： G11C29/00 ,  G11C7/00 ,  G11C8/00

CPC分类号： G11C7/12 ,  G11C7/20 ,  G11C8/06 ,  G11C8/10 ,  G11C8/12 ,  G11C11/401 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/4072 ,  G11C11/4087 ,  G11C11/4094 ,  G11C29/50 ,  G11C2029/5006 ,  G11C2207/2227 ,  G11C2211/4067

摘要： Each memory block has a plurality of memory cells, and word lines and bit lines connected to the memory cells. Precharge switches connect the bit lines to a precharge line. A switch control circuit controls an operation of the precharge switches and sets a cutoff function that turns off connection switches in a standby period in which no access operation of the memory cells is performed. Since connections of the bit lines and the precharge switch and those of the bit lines and the sense amplifier are cut off in the standby period, if a short circuit failure is present between a word line and a bit line, a leak current can be prevented from flowing from the word line to a precharge voltage line and so on.

摘要翻译： 每个存储块具有多个存储单元，并且连接到存储单元的字线和位线。 预充电开关将位线连接到预充电线。 开关控制电路控制预充电开关的操作，并且设置在不执行存储单元的访问操作的待机时段中断开连接开关的截止功能。 由于位线和预充电开关的连接以及位线和读出放大器的连接在待机期间被切断，所以如果在字线和位线之间存在短路故障，则可以防止泄漏电流 从字线流向预充电电压线等。

公开(公告)号：US20090160572A1

公开(公告)日：2009-06-25

申请号：US12336923

申请日：2008-12-17

申请人： Hiroyuki KOBAYASHI

发明人： Hiroyuki KOBAYASHI

IPC分类号： H03C3/00

CPC分类号： H04B1/0483 ,  H03C5/00

摘要： A communication apparatus has a local oscillator which performs phase modulation based on a phase component of a baseband signal and outputs a phase modulated signal, a controlling circuit which is supplied with an integer portion included in an amplitude component of the baseband signal and generates and outputs a controlling signal based on a size of the integer portion, a subtractor which is supplied with the integer portion and the controlling signal, subtracts a value of the controlling signal from the integer portion, and outputs a result, a MASH (Multi-stAge-noise-Shaping) circuit which is a second-order delta-sigma modulation means supplied with a fractional portion of the amplitude component, an order of the MASH circuit being switchable between a first order and a second order based on the controlling signal, and an amplifier which sets a voltage value based on an output of the MASH circuit and an output of the subtractor, multiplies the voltage value and the phase modulated signal, and outputs a result.

摘要翻译： 通信装置具有本地振荡器，其基于基带信号的相位分量执行相位调制，并输出相位调制信号，控制电路被提供有包含在基带信号的幅度分量中的整数部分，并产生并输出 基于整数部分的大小的控制信号，提供整数部分的减法器和控制信号，从整数部分中减去控制信号的值，并输出结果，MASH（Multi-stAge- 噪声整形）电路，其是被提供有幅度分量的小数部分的二阶Δ-Σ调制装置，所述MASH电路的顺序可基于所述控制信号在第一阶和第二阶之间切换，并且 放大器，其基于MASH电路的输出和减法器的输出设置电压值，将电压值和相位调制 信号并输出​​结果。

公开(公告)号：US20090120261A1

公开(公告)日：2009-05-14

申请号：US12329742

申请日：2008-12-08

申请人： Kinshiro NAITO ,  Masayuki SHIMIZU ,  Shigeru ENDO ,  Takashi MATSUMOTO ,  Hiroshi NAKAI ,  Hiroyuki KOBAYASHI

发明人： Kinshiro NAITO ,  Masayuki SHIMIZU ,  Shigeru ENDO ,  Takashi MATSUMOTO ,  Hiroshi NAKAI ,  Hiroyuki KOBAYASHI

IPC分类号： B21D37/08 ,  B21D28/24 ,  B21D28/34

CPC分类号： B26D7/1854 ,  B21D28/34 ,  B21D45/003 ,  B26F1/40 ,  B26F1/44 ,  Y10T83/0443 ,  Y10T83/0453 ,  Y10T83/2066 ,  Y10T83/2068 ,  Y10T83/9416 ,  Y10T83/9425 ,  Y10T83/9437

摘要： A die body includes a die hole for punching a work. A core, including a discharge hole, which is in communication with the die hole, is provided in the die body. The core is provided with a plurality of fluid injection ports through which fluid is injected downward of the discharge hole. The die body is provided with inflow ports through which compressed fluid flows into the fluid injection ports. The core is made of resin. The discharge hole is tapered toward its upper side. An outer peripheral surface of the die body is provided with a peripheral groove which is in communication with the inflow ports.

摘要翻译： 模具包括用于冲压工件的模孔。 在模具体中设置有与模孔相连通的排出孔的芯体。 芯部设置有多个流体注入口，流体通过该流体注入口向排放孔的下方注入。 模具体设置有流入端口，压缩流体通过该流入口流入流体注入口。 核心由树脂制成。 排出孔朝向其上侧逐渐变细。 模体的外周面设置有与流入口连通的周向槽。

公开(公告)号：US20090027980A1

公开(公告)日：2009-01-29

申请号：US12239452

申请日：2008-09-26

申请人： Hiroyuki KOBAYASHI

发明人： Hiroyuki KOBAYASHI

IPC分类号： G11C29/04 ,  G11C17/16

CPC分类号： G11C29/848 ,  G11C7/24

摘要： Address comparison circuits each compare the defect addresses programmed in the redundancy fuse circuits with an access address and output a redundancy signal when a comparison result is a match. A switch circuit is controlled to switch according to a redundancy selection signal output from a selection fuse circuit, and validates in response to the redundancy signal either a corresponding regular redundancy line or the reservation redundancy line. By dividing the redundancy lines into the regular redundancy lines and the reservation redundancy line, each of the redundancy fuse circuits can be made to correspond to one of the plurality of redundancy lines with the simple switch circuit. Therefore, a difference in propagation delay time of a signal can be made small and a difference in access time can be made small between when relieving a defect and when there is no defect.

摘要翻译： 每个地址比较电路将冗余熔丝电路中编程的缺陷地址与访问地址进行比较，并在比较结果匹配时输出冗余信号。 控制开关电路根据从选择熔丝电路输出的冗余选择信号进行切换，并根据冗余信号进行相应的规则冗余线路或预留冗余线路的验证。 通过将冗余线划分为常规冗余线和预留冗余线，可以利用简单的开关电路使冗余熔丝电路与多条冗余线之一相对应。 因此，当消除缺陷和不存在缺陷时，可以使信号的传播延迟时间的差异小，并且可以减小访问时间的差异。

公开(公告)号：US20090016133A1

公开(公告)日：2009-01-15

申请号：US12234181

申请日：2008-09-19

申请人： Hiroyuki KOBAYASHI

发明人： Hiroyuki KOBAYASHI

IPC分类号： G11C7/00 ,  G11C8/08

CPC分类号： G11C11/4094 ,  G11C7/12 ,  G11C7/22 ,  G11C11/4076 ,  G11C2207/005 ,  G11C2207/2227 ,  G11C2207/2281

摘要： A first precharge circuit couples a bit line pair to a precharge voltage line in a standby period, and separates at least an access side of the bit line pair from the precharge voltage line in accordance with operation start of a word line driving circuit. A sense amplifier amplifies a voltage difference of a node pair after the operation start of the word line driving circuit. A switch circuit is provided between the bit line pair and the node pair. The switch circuit has coupled the access side of the bit line pair to an access side of the node pair at an instant of the operation start of the word line driving circuit, and has separated a non-access side of the bit line pair from a non-access side of the node pair at an instant of operation start of the sense amplifier.

摘要翻译： 第一预充电电路在待机期间将位线对耦合到预充电电压线，并且根据字线驱动电路的操作开始，将位线对的至少一个存取侧与预充电电压线分开。 读出放大器放大字线驱动电路的运行开始后的节点对的电压差。 在位线对和节点对之间提供开关电路。 开关电路在字线驱动电路的操作开始时刻将位线对的存取侧耦合到节点对的存取侧，并且将位线对的非存取侧与 在感测放大器的操作启动时刻，节点对的非接入侧。