Methods of fabricating semiconductor device including phase change layer
    22.
    发明授权
    Methods of fabricating semiconductor device including phase change layer 有权
    制造包括相变层的半导体器件的方法

    公开(公告)号:US07838326B2

    公开(公告)日:2010-11-23

    申请号:US12405408

    申请日:2009-03-17

    IPC分类号: H01L21/00

    摘要: Provided are methods of fabricating a semiconductor device including a phase change layer. Methods may include forming a dielectric layer on a substrate, forming an opening in the dielectric layer and depositing, on the substrate having the opening, a phase change layer that contains an element that lowers a process temperature of a thermal treatment process to a temperature that is lower than a melting point of the phase change layer. Methods may include migrating a portion of the phase change layer from outside the opening, into the opening by the thermal treatment process that includes the process temperature that is lower than the melting point of the phase change layer.

    摘要翻译: 提供制造包括相变层的半导体器件的方法。 方法可以包括在衬底上形成电介质层,在电介质层中形成开口,并在具有开口的衬底上沉积相变层,该相变层含有将热处理工艺的工艺温度降低到 低于相变层的熔点。 方法可以包括通过包括低于相变层的熔点的工艺温度的热处理工艺将一部分相变层从开口外部迁移到开口中。

    Schottky diode and method of fabricating the same
    24.
    发明申请
    Schottky diode and method of fabricating the same 审中-公开
    肖特基二极管及其制造方法

    公开(公告)号:US20080006899A1

    公开(公告)日:2008-01-10

    申请号:US11797560

    申请日:2007-05-04

    IPC分类号: H01L29/47 H01L21/28

    摘要: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may, be formed under a portion of the schottky junction.

    摘要翻译: 肖特基二极管可以包括包括在半导体衬底中形成的阱和与第一阱接触的第一电极的肖特基结。 该井可具有第一导电类型。 第一欧姆结可以包括形成在阱中的第一结区域和与第一结区接触的第二电极。 第一结区可能具有比阱更高的第一导电类型的浓度。 可以在分离肖特基结和第一欧姆结的半导体衬底中形成第一器件隔离区。 可以在井中形成具有与第一导电类型相反的第二导电类型的保护罩。 可以在肖特基结的一部分下方形成阱护罩的至少一部分。

    Schottky diode and method of fabricating the same
    28.
    发明申请
    Schottky diode and method of fabricating the same 有权
    肖特基二极管及其制造方法

    公开(公告)号:US20100200945A1

    公开(公告)日:2010-08-12

    申请号:US12662452

    申请日:2010-04-19

    IPC分类号: H01L29/872

    摘要: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.

    摘要翻译: 肖特基二极管可以包括包括在半导体衬底中形成的阱和与第一阱接触的第一电极的肖特基结。 该井可具有第一导电类型。 第一欧姆结可以包括形成在阱中的第一结区域和与第一结区接触的第二电极。 第一结区可能具有比阱更高的第一导电类型的浓度。 可以在分离肖特基结和第一欧姆结的半导体衬底中形成第一器件隔离区。 可以在井中形成具有与第一导电类型相反的第二导电类型的保护罩。 阱护套的至少一部分可以形成在肖特基结的一部分下方。

    Phase change memory device including resistant material
    29.
    发明授权
    Phase change memory device including resistant material 失效
    相变记忆装置,包括耐磨材料

    公开(公告)号:US07759667B2

    公开(公告)日:2010-07-20

    申请号:US11762801

    申请日:2007-06-14

    IPC分类号: H01L29/04

    摘要: A phase change memory device includes a lower electrode provided on a substrate, an interlayer insulating layer including a contact hole exposing the lower electrode, and covering the substrate, a resistant material pattern filling the contact hole, a phase change pattern interposed between the resistant material pattern and the interlayer insulating layer, and extending between the resistant material pattern and the lower electrode, wherein the resistant material pattern has a higher resistance than the phase change pattern, and an upper electrode in contact with the phase change pattern, the upper electrode being electrically connected to the lower electrode through the phase change pattern.

    摘要翻译: 相变存储器件包括设置在基板上的下电极,包括暴露下电极的接触孔并覆盖基板的层间绝缘层,填充接触孔的电阻材料图案,插入在电阻材料之间的相变图案 图案和层间绝缘层,并且在电阻材料图案和下电极之间延伸,其中电阻材料图案具有比相变图案更高的电阻,以及与相变图案接触的上电极,上电极为 通过相变图案电连接到下电极。