公开(公告)号：US20240283756A1

公开(公告)日：2024-08-22

申请号：US18425968

申请日：2024-01-29

Applicant: Intel Corporation

Inventor： Shaopeng HE ,  Cunming LIANG ,  Jiang YU ,  Ziye YANG ,  Ping YU ,  Bo CUI ,  Jingjing WU ,  Liang MA ,  Hongjun NI ,  Zhiguo WEN ,  Changpeng LIU ,  Anjali Singhai JAIN ,  Daniel DALY ,  Yadong LI

IPC: H04L49/9057 ,  H04L1/1829 ,  H04L47/34 ,  H04L47/56 ,  H04L49/552 ,  H04L49/90

CPC classification number: H04L49/9057 ,  H04L1/1841 ,  H04L47/34 ,  H04L47/56 ,  H04L49/552 ,  H04L49/9094

Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.

公开(公告)号：US20230319133A1

公开(公告)日：2023-10-05

申请号：US18205984

申请日：2023-06-05

Applicant: Intel Corporation

Inventor： Patrick G. KUTCH ,  Carolyn WYBORNY ,  Ziye YANG

IPC: H04L67/101

CPC classification number: H04L67/101

Abstract: Examples described herein relate to a network interface device that includes a network interface and circuitry. In some examples, the circuitry is to receive a request to perform a service and select a servicing node based on network latency and/or proximity of the requested service to the network interface device. In some examples, a proximity of the requested service includes execution in the network interface device.

公开(公告)号：US20230130859A1

公开(公告)日：2023-04-27

申请号：US17894041

申请日：2022-08-23

Applicant: Intel Corporation

Inventor： Xiaodong LIU ,  Ziye YANG ,  James R. HARRIS ,  Changpeng LIU ,  Gang CAO

IPC: G06F12/0811 ,  G06F12/0873

Abstract: An apparatus is described. The apparatus includes a network interface having a system interface, a media access interface and circuitry to construct a block of null values for a logical block address (LBA) in response to a remote storage system having informed the network interface that the LBA was un-mappable.

公开(公告)号：US20230023766A1

公开(公告)日：2023-01-26

申请号：US17955797

申请日：2022-09-29

Applicant: Intel Corporation

Inventor： Ziye YANG

IPC: G06F8/61 ,  G06F9/445

Abstract: Examples described herein relate to a network interface device that includes circuitry and a memory. In some examples, the circuitry is to perform image construction operations, wherein the image construction operations comprise access to a base image of an application from the memory in the network interface device. In some examples, the circuitry is to provide a host server access to a constructed image bundle of the application.

公开(公告)号：US20220335139A1

公开(公告)日：2022-10-20

申请号：US17853800

申请日：2022-06-29

Applicant: Intel Corporation

Inventor： Ziye YANG ,  Malini K. BHANDARU ,  Jiangyun ZHU ,  Yu WANG

IPC: G06F21/60 ,  G06F21/57 ,  G06F21/78 ,  G06F9/455

Abstract: A method is described. The method includes sending a first request for portions of the container image. The method includes sending a second request for respective security keys for the portions of the container image. The method includes receiving the portions of the container image in encrypted form. The method includes receiving the respective security keys encrypted with a public key of an enclave of a trusted execution environment. The method includes decrypting the respective security keys with a private key of the enclave of the trusted execution environment. The method includes decrypting the encrypted portions of the container image with the decrypted respective keys.

公开(公告)号：US20200241927A1

公开(公告)日：2020-07-30

申请号：US16849915

申请日：2020-04-15

Applicant: Intel Corporation

Inventor： Ziye YANG ,  James R. HARRIS ,  Kiran PATIL ,  Benjamin WALKER ,  Sudheer MOGILAPPAGARI ,  Yadong LI ,  Mark WUNDERLICH ,  Anil VASUDEVAN

IPC: G06F9/50 ,  G06F9/54 ,  G06F9/46 ,  G06F13/22 ,  H04L29/08

Abstract: Examples described herein relate to at least one processor that can execute a polling group to poll for storage transactions associated with a first group of one or more particular queue identifiers, wherein the one or more particular queue identifiers are associated with one or more queues that can be accessed using the polling group and no other polling group. In some examples, the polling group is to execute on a processor that runs no other polling group. In some examples, the at least one processor is configured to: execute a second polling group on a second processor, wherein the second polling group is to poll for storage transactions for a second group of one or more particular queue identifiers that are different than the one or more particular queue identifiers of the first group, wherein the second group of one or more particular queue identifiers are associated with one or more queues that can be accessed using the second polling group and not the first polling group.

公开(公告)号：US20200233717A1

公开(公告)日：2020-07-23

申请号：US15755216

申请日：2017-03-28

Applicant: INTEL CORPORATION

Inventor： Ned M. SMITH ,  Changzheng WEI ,  Songwu SHEN ,  Ziye YANG ,  Junyuan WANG ,  Weigang LI ,  Wenqian YU

IPC: G06F9/50 ,  G06F21/76

Abstract: Technologies for hybrid acceleration of code include a computing device (100) having a processor (120), a field-programmable gate array (FPGA) (130), and an application-specific integrated circuit (ASIC) (132). The computing device (100) offloads a service request, such as a cryptographic request or a packet processing request, to the FPGA (130). The FPGA (130) performs one or more algorithmic tasks of an algorithm to perform the service request. The FPGA (130) determines one or more primitive tasks associated with an algorithm task and encapsulates each primitive task in a buffer that is accessible by the ASIC (132). The ASIC (132) performs the primitive tasks in response to encapsulation in the buffer, and the FPGA (130) returns results of the algorithm. The primitive operations may include cryptographic primitives such as modular exponentiation, modular multiplicative inverse, and modular multiplication. The results may be returned to the processor (120) or a network interface controller of the computing device (100).