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21.
公开(公告)号:US20170020002A1
公开(公告)日:2017-01-19
申请号:US15137007
申请日:2016-04-25
Applicant: Industrial Technology Research Institute
Inventor: Sheng-Po Wang , Heng-Yin Chen , Cheng-Chung Lee , Jia-Chong Ho , Yung-Hui Yeh , Tai-Jui Wang
CPC classification number: H05K1/189 , H01L23/49827 , H01L23/5385 , H05K1/144 , H05K3/007 , H05K3/429 , H05K3/4644 , H05K3/4682 , H05K2201/10128
Abstract: A flexible electronic device including a first flexible substrate, an electronic component, and a control device is provided. The electronic component includes a conductive layer. The control device includes at least one integrated circuit and a circuit layer set. The circuit layer set includes a plurality of circuit layers and at least one first dielectric layer, and at least a portion of the first dielectric layer is interposed between two adjacent circuit layers. The integrated circuit is electrically connected to the electronic component through the circuit layer set and the conductive layer. At least a portion of the conductive layer and at least a portion of one circuit layer are integrally formed, and the conductive layer and the circuit layer are both disposed on the first flexible substrate. A fabricating method of a flexible electronic device is also provided.
Abstract translation: 提供了包括第一柔性基板,电子部件和控制装置的柔性电子装置。 电子部件包括导电层。 控制装置包括至少一个集成电路和电路层组。 电路层组包括多个电路层和至少一个第一电介质层,并且第一电介质层的至少一部分插入在两个相邻的电路层之间。 集成电路通过电路层组和导电层电连接到电子部件。 导电层的至少一部分和一个电路层的至少一部分被一体地形成,并且导电层和电路层均设置在第一柔性基板上。 还提供了一种柔性电子装置的制造方法。
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公开(公告)号:US09040401B1
公开(公告)日:2015-05-26
申请号:US14626675
申请日:2015-02-19
Applicant: Industrial Technology Research Institute
Inventor: Wen-Ching Sun , Sheng-Min Yu , Tai-Jui Wang , Tzer-Shen Lin
IPC: H01L21/22 , H01L21/38 , H01L21/225 , H01L31/18
CPC classification number: H01L21/225 , H01L21/22 , H01L21/2255 , H01L31/068 , H01L31/18 , H01L31/1804 , Y02E10/547 , Y02P70/521
Abstract: A method for forming doping regions is disclosed, including providing a substrate, forming a first-type doping material on the substrate and forming a second-type doping material on the substrate, wherein the first-type doping material is separated from the second-type doping material by a gap; forming a covering layer to cover the substrate, the first-type doping material and the second-type doping material; and performing a thermal diffusion process to diffuse the first-type doping material and the second-type doping material into the substrate.
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公开(公告)号:US20210098558A1
公开(公告)日:2021-04-01
申请号:US17037737
申请日:2020-09-30
Applicant: Industrial Technology Research Institute
Inventor: Wei-Chung Chen , Wen-Yu Kuo , Chieh-Wei Feng , Tai-Jui Wang
IPC: H01L27/32
Abstract: An electronic device including a pixel array structure, a redistribution structure, and a plurality of conductive via structures is provided. The pixel array structure includes a plurality of signal lines. The redistribution structure overlaps the pixel array structure and includes a plurality of conductive lines. The conductive via structures electrically connect the signal lines of the pixel array structure and the conductive lines of the redistribution structure. At least one of the conductive via structures shares at least one conductive layer with the pixel array structure.
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24.
公开(公告)号:US20200212033A1
公开(公告)日:2020-07-02
申请号:US16406032
申请日:2019-05-08
Applicant: Industrial Technology Research Institute
Inventor: Yu-Hua Chung , Tai-Jui Wang , Chieh-Wei Feng
IPC: H01L27/02 , H01L23/522 , H01L23/60
Abstract: An electrostatic discharge (ESD) protection apparatus and an integrated passive device (IPD) with capacitor(s) are provided. The ESD protection apparatus includes a transistor, an impedance, and a capacitor disposed in a redistribution layer (RDL) structure of a package. The first terminal and the second terminal of the transistor are respectively coupled to a first power rail and a second power rail of the RDL structure. A first terminal of the impedance is coupled to the first power rail. A second terminal of the impedance is coupled to a control terminal of the transistor. A first terminal of the capacitor is coupled to the second terminal of the impedance. A second terminal of the capacitor is coupled to the second power rail.
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公开(公告)号:US10418435B2
公开(公告)日:2019-09-17
申请号:US15691755
申请日:2017-08-31
Inventor: Tai-Jui Wang , Chieh-Wei Feng , Meng-Jung Yang , Wei-Han Chen , Shao-An Yan , Tsu-Chiang Chang
Abstract: A pixel structure including a substrate, a power wire, a planarization layer, a drive circuit and a conductive structure is provided. The substrate has a layout area and a light-transmitting area located outside the layout area. The power wire is disposed on the layout area of the substrate. The power wire includes a shielding layer. The planarization layer is disposed on the substrate and covers the power wire. The drive circuit is disposed on the planarization layer and corresponds to the layout area. The drive circuit includes a first active device. The shielding layer overlaps with the first active device. The conductive structure is disposed in the planarization layer and distributed corresponding to the layout area. The power wire is electrically connected with the drive circuit through the conductive structure. A display panel is also provided.
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公开(公告)号:US20190140106A1
公开(公告)日:2019-05-09
申请号:US15913897
申请日:2018-03-06
Inventor: Tai-Jui Wang , Yung-Hui Yeh , Jui-Wen Yang , Hsiao-Chiang Yao , Chun-Hung Chu
IPC: H01L29/786 , H01L29/66 , H01L29/49 , H01L27/12 , H01L21/02 , C23C16/24 , C23C16/34 , C23C16/40 , H01L51/05
Abstract: A thin film transistor including a flexible substrate, a semiconductor layer, a first gate, and a first gate dielectric layer is provided. The semiconductor layer is located on the flexible substrate. The first gate is located on the flexible substrate and corresponds to a portion of the semiconductor layer. The first gate dielectric layer is located between the first gate and the semiconductor layer. The first gate dielectric layer is in contact with the semiconductor layer, and the hydrogen atom concentration of the first gate dielectric layer is less than 6.5×1020 atoms/cm3. A method of manufacturing the thin film transistor is also provided.
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公开(公告)号:US20190103360A1
公开(公告)日:2019-04-04
申请号:US15919222
申请日:2018-03-13
Inventor: Cheng-Hung Yu , Tai-Jui Wang , Chieh-Wei Feng , Shih-Kuang Chiu , Ming-Huan Yang
IPC: H01L23/538 , H01L23/00 , H01L23/31
Abstract: A flexible chip package is provided. The flexible chip package includes a first flexible substrate; a first redistribution layer disposed on the first flexible substrate; a second flexible substrate; a second redistribution layer disposed on the second flexible substrate; a semiconductor chip disposed between the first and second redistribution layers and electrically connected to at least one of the first and second redistribution layers; and a first bonding layer disposed between the first and second redistribution layers and encapsulating the semiconductor chip, wherein the first bonding layer, the first redistribution layer and the second redistribution layer are between the first flexible substrate and the second flexible substrate.
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公开(公告)号:US10165688B2
公开(公告)日:2018-12-25
申请号:US15137007
申请日:2016-04-25
Applicant: Industrial Technology Research Institute
Inventor: Sheng-Po Wang , Heng-Yin Chen , Cheng-Chung Lee , Jia-Chong Ho , Yung-Hui Yeh , Tai-Jui Wang
Abstract: A flexible electronic device including a first flexible substrate, an electronic component, and a control device is provided. The electronic component includes a conductive layer. The control device includes at least one integrated circuit and a circuit layer set. The circuit layer set includes a plurality of circuit layers and at least one first dielectric layer, and at least a portion of the first dielectric layer is interposed between two adjacent circuit layers. The integrated circuit is electrically connected to the electronic component through the circuit layer set and the conductive layer. At least a portion of the conductive layer and at least a portion of one circuit layer are integrally formed, and the conductive layer and the circuit layer are both disposed on the first flexible substrate. A fabricating method of a flexible electronic device is also provided.
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公开(公告)号:US09960245B1
公开(公告)日:2018-05-01
申请号:US15458984
申请日:2017-03-15
Applicant: Industrial Technology Research Institute
Inventor: Tai-Jui Wang , Tsu-Chiang Chang , Chieh-Wei Feng , Shao-An Yan , Wei-Han Chen
IPC: H01L29/76 , H01L29/423 , H01L29/786 , H01L29/66 , H01L29/417
CPC classification number: H01L29/42384 , H01L29/41733 , H01L29/66757 , H01L29/78675 , H01L29/78696
Abstract: A transistor device including a semiconductor material layer, a gate layer, and an insulation layer between the gate layer and the semiconductor material layer is provided. The semiconductor material layer includes a first conductive portion, a second conductive portion, a channel portion between the first conductive portion and the second conductive portion, and a first protruding portion formed integrally. The channel portion has a first boundary adjacent to the first conductive portion, a second boundary adjacent to the second conductive portion, a third boundary, and a fourth boundary. The third boundary and the fourth boundary connect the terminals of the first boundary and the second boundary. The first protruding portion is protruded outwardly from the third boundary of the channel portion. The first gate boundary and the second gate boundary are overlapped with the first boundary and the second boundary of the channel portion.
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公开(公告)号:US09786790B2
公开(公告)日:2017-10-10
申请号:US15062222
申请日:2016-03-07
Applicant: Industrial Technology Research Institute
Inventor: Ching-Wen Su , Tai-Jui Wang , Hsiao-Chiang Yao , Tsu-Chiang Chang , Bo-Yuan Su
IPC: H01L29/78 , H01L29/786 , H01L21/324 , H01L23/552
CPC classification number: H01L29/78675 , H01L21/324 , H01L23/552 , H01L27/1218 , H01L29/78603 , H01L29/78633
Abstract: In one embodiment, a flexible device is provided. The flexible device may include a flexible substrate, a buffer layer, a light reflective layer, and a device layer. The buffer layer is located on the flexible substrate. The light reflective layer is located on the flexible substrate, wherein the light reflective layer has a reflection wavelength of 200 nm˜1100 nm, a reflection ratio of greater than 80%, and a stress direction of the light reflective layer is the same as a stress direction of the flexible substrate. The device layer is located on the light reflective layer and the buffer layer.
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