公开(公告)号：US20210408227A1

公开(公告)日：2021-12-30

申请号：US16914137

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Kevin O'Brien ,  Chelsey Dorow ,  Kirby Maxey ,  Carl Naylor ,  Shriram Shivaraman ,  Sudarat Lee ,  Tanay Gosavi ,  Chia-Ching Lin ,  Uygar Avci ,  Ashish Verma Penumatcha

IPC: H01L29/04 ,  H01L29/267 ,  H01L29/06 ,  H01L29/20 ,  H01L21/02 ,  H01L27/092

Abstract: A transistor structure includes a first channel layer over a second channel layer, where the first and the second channel layers include a monocrystalline transition metal dichalcogenide (TMD). The transistor structure further includes a source material coupled to a first end of the first and second channel layers, a drain material coupled to a second end of the first and second channel layers, a gate electrode between the source material and the drain material, and between the first channel layer and the second channel layer and a gate dielectric between the gate electrode and each of the first channel layer and the second channel layer.

公开(公告)号：US20200343301A1

公开(公告)日：2020-10-29

申请号：US16396451

申请日：2019-04-26

Applicant: Intel Corporation

Inventor： Benjamin Buford ,  Angeline Smith ,  Noriyuki Sato ,  Tanay Gosavi ,  Kaan Oguz ,  Christopher Wiegand ,  Kevin O'Brien ,  Tofizur Rahman ,  Gary Allen ,  Sasikanth Manipatruni ,  Emily Walker

IPC: H01L27/22 ,  H01L43/14 ,  H01L43/08 ,  H01L43/06 ,  H01L43/04

Abstract: A memory apparatus includes a first electrode having a spin orbit material. The memory apparatus further includes a first memory device on a portion of the first electrode and a first dielectric adjacent to a sidewall of the first memory device. The memory apparatus further includes a second memory device on a portion of the first electrode and a second dielectric adjacent to a sidewall of the second memory device. A second electrode is on and in contact with a portion of the first electrode, where the second electrode is between the first memory device and the second memory device. The second electrode has a lower electrical resistance than an electrical resistance of the first electrode. The memory apparatus further includes a first interconnect structure and a second interconnect, each coupled with the first electrode.

公开(公告)号：US20200212194A1

公开(公告)日：2020-07-02

申请号：US16238420

申请日：2019-01-02

Applicant: Intel Corporation

Inventor： Tanay Gosavi ,  Chia-ching Lin ,  Raseong Kim ,  Ashish Verma Penumatcha ,  Uygar Avci ,  Ian Young

IPC: H01L29/51 ,  H01L27/088 ,  H01L29/423 ,  H03H9/17 ,  H01L29/78

Abstract: Describe is a resonator that uses ferroelectric (FE) materials in the gate of a transistor as a dielectric. The use of FE increases the strain/stress generated in the gate of the FinFET. Along with the usual capacitive drive, which is boosted with the increased polarization, FE material expands or contacts depending on the applied electric field on the gate of the transistor. As such, acoustic waves are generated by switching polarization of the FE materials. In some embodiments, the acoustic mode of the resonator is isolated using phononic gratings all around the resonator using the metal line above and vias' to body and dummy fins on the side. As such, a Bragg reflector is formed above the FE based transistor.

公开(公告)号：US20200083284A1

公开(公告)日：2020-03-12

申请号：US16128278

申请日：2018-09-11

Applicant: Intel Corporation

Inventor： Sasikanth Manipatruni ,  Tanay Gosavi ,  Dmitri Nikonov ,  Ian Young

IPC: H01L27/16 ,  H01L25/16 ,  H01L35/34 ,  H01L23/367 ,  H01L23/373 ,  H01L35/22 ,  H01L35/30 ,  H01L35/32

Abstract: Electrical devices with an integral thermoelectric generator comprising a spin-Seebeck insulator and a spin orbit coupling material, and associated methods of fabrication. A spin-Seebeck thermoelectric material stack may be integrated into macroscale power cabling as well as nanoscale device structures. The resulting structures are to leverage the spin-Seebeck effect (SSE), in which magnons may transport heat from a source (an active device or passive interconnect) and through the spin-Seebeck insulator, which develops a resulting spin voltage. The SOC material is to further convert the spin voltage into an electric voltage to complete the thermoelectric generation process. The resulting electric voltage may then be coupled into an electric circuit.

公开(公告)号：US20190385655A1

公开(公告)日：2019-12-19

申请号：US16009107

申请日：2018-06-14

Applicant: Intel Corporation

Inventor： Chia-Ching Lin ,  Sasikanth Manipatruni ,  Tanay Gosavi ,  Dmitri Nikonov ,  Benjamin Buford ,  Kaan Oguz ,  John J. Plombon ,  Ian A. Young

IPC: G11C11/16 ,  H01L43/10 ,  H01L43/02

Abstract: An apparatus is provided which comprises: a stack comprising a magnetic insulating material (MI such as EuS, EuO, YIG, TmIG, or GaMnAs) and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, or graphene), wherein the magnetic insulating material has a first magnetization; a magnet with a second magnetization, wherein the magnet is adjacent to the TMD of the stack; and an interconnect comprising a spin orbit material, wherein the interconnect is adjacent to the magnet.

公开(公告)号：US20190305216A1

公开(公告)日：2019-10-03

申请号：US15942231

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Tanay Gosavi ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Ian Young ,  Kevin O'Brien ,  Gary Allen ,  Noriyuki Sato

IPC: H01L43/10 ,  H01L43/04 ,  H01L43/06 ,  H01L43/14 ,  G11C11/16 ,  H01L27/22

Abstract: An apparatus is provided which comprises: a magnetic junction having a magnet with a first magnetization; an interconnect adjacent to the magnetic junction, wherein the interconnect comprises an antiferromagnetic (AFM) material which is doped with a doping material (Pt, Ni, Co, or Cr) and a structure adjacent to the interconnect such that the magnetic junction and the structure are on opposite surfaces of the interconnect, wherein the structure comprises a magnet with a second magnetization substantially different from the first magnetization.

公开(公告)号：US20190304653A1

公开(公告)日：2019-10-03

申请号：US15942434

申请日：2018-03-31

Applicant: Intel Corporation

Inventor： Kaan Oguz ,  Tanay Gosavi ,  Sasikanth Manipatruni ,  Charles Kuo ,  Mark Doczy ,  Kevin O'Brien

IPC: H01F10/32 ,  H01F41/30 ,  H01L43/08 ,  G11C11/16 ,  H01L43/12 ,  H01L27/22

Abstract: A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit torque material, where the SOT material includes iridium and manganese and a perpendicular magnetic tunnel junction (pMTJ) device on a portion of the electrode. The pMTJ device includes a free magnet structure electrode, a fixed layer and a tunnel barrier between the free layer and the fixed layer and a SAF structure above the fixed layer. The Ir—Mn SOT material and the free magnet have an in-plane magnetic exchange bias.

公开(公告)号：US12176388B2

公开(公告)日：2024-12-24

申请号：US16914137

申请日：2020-06-26

Applicant: Intel Corporation

Inventor： Kevin O'Brien ,  Chelsey Dorow ,  Kirby Maxey ,  Carl Naylor ,  Shriram Shivaraman ,  Sudarat Lee ,  Tanay Gosavi ,  Chia-Ching Lin ,  Uygar Avci ,  Ashish Verma Penumatcha

IPC: H01L29/04 ,  H01L21/02 ,  H01L27/092 ,  H01L29/06 ,  H01L29/20 ,  H01L29/267

Abstract: A transistor structure includes a first channel layer over a second channel layer, where the first and the second channel layers include a monocrystalline transition metal dichalcogenide (TMD). The transistor structure further includes a source material coupled to a first end of the first and second channel layers, a drain material coupled to a second end of the first and second channel layers, a gate electrode between the source material and the drain material, and between the first channel layer and the second channel layer and a gate dielectric between the gate electrode and each of the first channel layer and the second channel layer.

公开(公告)号：US12125893B2

公开(公告)日：2024-10-22

申请号：US18130334

申请日：2023-04-03

Applicant: Intel Corporation

Inventor： Tanay Gosavi ,  Chia-Ching Lin ,  Raseong Kim ,  Ashish Verma Penumatcha ,  Uygar Avci ,  Ian Young

IPC: H01L29/51 ,  H01L27/088 ,  H01L29/423 ,  H01L29/78 ,  H03H9/17

CPC classification number: H01L29/516 ,  H01L27/0886 ,  H01L29/42356 ,  H01L29/78391 ,  H01L29/7851 ,  H03H9/17

Abstract: Describe is a resonator that uses anti-ferroelectric (AFE) materials in the gate of a transistor as a dielectric. The use of AFE increases the strain/stress generated in the gate of the FinFET. Along with the usual capacitive drive, which is boosted with the increased polarization, additional current drive is also achieved from the piezoelectric response generated to due to AFE material. In some embodiments, the acoustic mode of the resonator is isolated using phononic gratings all around the resonator using the metal line above and vias' to body and dummy fins on the side. As such, a Bragg reflector is formed above or below the AFE based transistor. Increased drive signal from the AFE results in larger output signal and larger bandwidth.

公开(公告)号：US12009018B2

公开(公告)日：2024-06-11

申请号：US17839345

申请日：2022-06-13

Applicant: Intel Corporation

Inventor： Chia-Ching Lin ,  Sasikanth Manipatruni ,  Tanay Gosavi ,  Dmitri Nikonov ,  Benjamin Buford ,  Kaan Oguz ,  John J. Plombon ,  Ian A. Young

IPC: G11C11/16 ,  H10N50/80 ,  H10N50/85

CPC classification number: G11C11/161 ,  H10N50/80 ,  H10N50/85

Abstract: An apparatus is provided which comprises: a stack comprising a magnetic insulating material (MI such as EuS, EuO, YIG, TmIG, or GaMnAs) and a transition metal dichalcogenide (TMD such as MoS2, MoSe2, WS2, WSe2, PtS2, PtSe2, WTe2, MoTe2, or graphene), wherein the magnetic insulating material has a first magnetization; a magnet with a second magnetization, wherein the magnet is adjacent to the TMD of the stack; and an interconnect comprising a spin orbit material, wherein the interconnect is adjacent to the magnet.